Xilinx VCU1525

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VCU1525 Acceleration Platform User Guide 58

UG1268 (v1.0) November 13, 2017 www.xilinx.com

Appendix A: Master Constraints File Listing

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_C12];

set_property PACKAGE_PIN AN14 [get_ports DDR4_C1_DQS_T12];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_T12];

set_property PACKAGE_PIN BF15 [get_ports DDR4_C1_DQS_C13];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_C13];

set_property PACKAGE_PIN BE15 [get_ports DDR4_C1_DQS_T13];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_T13];

set_property PACKAGE_PIN BC14 [get_ports DDR4_C1_DQS_C14];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_C14];

set_property PACKAGE_PIN BB14 [get_ports DDR4_C1_DQS_T14];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_T14];

set_property PACKAGE_PIN AY16 [get_ports DDR4_C1_DQS_C15];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_C15];

set_property PACKAGE_PIN AW16 [get_ports DDR4_C1_DQS_T15];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_T15];

set_property PACKAGE_PIN AM16 [get_ports DDR4_C1_DQS_C16];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_C16];

set_property PACKAGE_PIN AM17 [get_ports DDR4_C1_DQS_T16];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_T16];

set_property PACKAGE_PIN BF22 [get_ports DDR4_C1_DQS_C17];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_C17];

set_property PACKAGE_PIN BE22 [get_ports DDR4_C1_DQS_T17];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C1_DQS_T17];

# DDR4 C2 DIMM I/F

set_property PACKAGE_PIN L29 [get_ports DDR4_C2_ADR0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR0];

set_property PACKAGE_PIN A33 [get_ports DDR4_C2_ADR1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR1];

set_property PACKAGE_PIN C33 [get_ports DDR4_C2_ADR2];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR2];

set_property PACKAGE_PIN J29 [get_ports DDR4_C2_ADR3];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR3];

set_property PACKAGE_PIN H31 [get_ports DDR4_C2_ADR4];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR4];

set_property PACKAGE_PIN G31 [get_ports DDR4_C2_ADR5];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR5];

set_property PACKAGE_PIN C32 [get_ports DDR4_C2_ADR6];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR6];

set_property PACKAGE_PIN B32 [get_ports DDR4_C2_ADR7];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR7];

set_property PACKAGE_PIN A32 [get_ports DDR4_C2_ADR8];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR8];

set_property PACKAGE_PIN D31 [get_ports DDR4_C2_ADR9];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR9];

set_property PACKAGE_PIN A34 [get_ports DDR4_C2_ADR10];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR10];

set_property PACKAGE_PIN E31 [get_ports DDR4_C2_ADR11];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR11];

set_property PACKAGE_PIN M30 [get_ports DDR4_C2_ADR12];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR12];

set_property PACKAGE_PIN F33 [get_ports DDR4_C2_ADR13];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR13];

set_property PACKAGE_PIN A35 [get_ports DDR4_C2_ADR14];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR14];

set_property PACKAGE_PIN G32 [get_ports DDR4_C2_ADR15];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR15];

set_property PACKAGE_PIN K30 [get_ports DDR4_C2_ADR16];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR16];

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