Xilinx Virtex-5 LXT User Manual

14 www.xilinx.com Virtex-5 LXT/SXT/FXT FPGA Prototype Platform
UG229 (v3.0.1) May 21, 2008
Detailed Description
R
Off Position
In the OFF position, the power switch disables all modes of powering the DUT.
Tabl e 1: Voltage Ranges
Label Maximum Voltage Maximum Current
VCCINT 1.0V 7A
VCCO 2.5V 4A
VCCAUX 2.5V 3A
VCC1V8 1.8V 3A
AV CC
(1)
1.0V 1.5A
AVCCPLL
(1,2)
1.0V, 1.2V
1.5A
AVTTTX
(1)
1.2V 1.5A
AVTTRX
(1)
1.2V 1.5A
Notes:
1. This GTP/GTX transceiver power supply name might have the prefix
MGT in other Xilinx documentation. Names with and without the
MGT prefix are synonymous to each other.
2. The maximum voltage for AVCCPLL is 1.0V for FXT devices; 1.2V for
LXT and SXT devices.
Tabl e 2: Power Enable Jumpers
Header Description
J19
J20
J21
These headers are in each power supply and are marked REG ENABLE.
Placement of jumpers on these headers enables delivery of all power from the
onboard regulators.
Removing all jumpers allows the user to provide power from the three power
supply jacks marked VCCINT, VCCO, and VCCAUX.
Note: If using an external bench top power supply, 5V must be applied to the 5V
jack, J32, for proper operation.
J36
This header provides GTP/GTX transceiver power.
If J36 is a 2-pin header, install jumper for proper operation.
If J36 is a 3-pin header, install jumper on pins 2-3 for proper operation.
J37
J38
J39
These headers provide GTP/GTX transceiver power.
Pins 2-3 are marked for onboard regulation. Keep jumpers on these pins
enabled for proper operation.

Xilinx Virtex-5 LXT Specifications

General

Brand	Xilinx
Model	Virtex-5 LXT
Category	Microcontrollers
Language	English