Xilinx Virtex-5 LXT User Manual

24 www.xilinx.com Virtex-5 LXT/SXT/FXT FPGA Prototype Platform
UG229 (v3.0.1) May 21, 2008
Detailed Description
R
15. PROGRAM Switch
This active-Low PROGRAM switch (SW1) grounds the DUT’s PROG pin when pressed.
This action clears the DUT.
16. RESET Switch (Active-Low)
The RESET switch (SW2) connects to a standard I/O pin on the DUT, allowing the user,
after configuration, to reset the logic within the DUT. When pressed, this switch grounds
the pin. Table 10 shows the INIT pin locations for the available DUT package types.
17. DONE LED
The DONE LED (DS2) indicates the status of the DONE pin on the DUT. This LED lights
up when DONE is High or if power is applied to the board without a part in the socket.
18. INIT LED
The INIT LED (DS1) lights when the DUT has successfully powered up and completed its
internal power-on process.
19. Platform Flash ISPROM
A 32-Mb Platform Flash ISPROM (U4) is provided on the board for configuration
(Table 11). Refer to the Platform Flash ISPROM data sheet [Ref 2] for a detailed description.
Table 10: User Hardware and Corresponding I/O Pins
Pin Number For Package Type
Label FF665 FF1136 FF1738
RESET J21 J32 W40
Notes:
Refer to the readme.txt file for implementation of these user pins.
Table 11: Platform Flash ISPROM Configuration
Label Description
J42
Provides power to the ISPROM. These jumpers must be installed for proper
operation of the ISPROM.
J43
Sets the design revision control for the ISPROM.
J24
Enables or disables the ISPROM by placing the address counter in reset and
DATA output lines in high-impedance state.
J27
Sets the ISPROM for serial or select map configuration.
J3
Selects one of two modes of CCLK operation:
• ISPROM provides CCLK (PROM CLKOUT)
• FPGA provides CCLK (FPGA CCLK)

Xilinx Virtex-5 LXT Specifications

General

Brand	Xilinx
Model	Virtex-5 LXT
Category	Microcontrollers
Language	English