Xilinx Zynq UltraScale+ User Manual

Zynq UltraScale+ VCU TRD User Guide 80
UG1250 (v2019.1) May 29, 2019 www.xilinx.com
Appendix A: Input Configuration File
Enable SCD Flag: Enables/disables the SCD plugin before encoding
Options: True, False
Uri: File path or Network URL. Applicable for file playback and stream-in pipeline only.
Supported file formats for playback are ts, mp4, and mkv.
Options:
file:///media/usb/abc.mp4 (for file path)
udp://192.168.25.89:5004/ (for network streaming)
Note:
Here 192.168.25.89 is the IP address and 5004 is the port number
Raw: Tells the pipeline to run the raw or processed pipeline
Options: True, False
Width: Width of the live source
Options: 3840, 1920
Height: Height of the live source
Options: 2160, 1080
Accelerator Flag: Enables/disables the SDx accelerator. For this release, the accelerator
functions as a bypass filter.
Options: True, False
Enable SCD Flag: Enables/disables the SCD plugin before encoding
Options: True, False
Format: Format of input data
Options: NV12, NV16, XV15, XV20
Exit: Tells the application when input configuration is finished
Encoder Configuration: Starting point of encoder configuration
Encoder Num: Starting nth encoder configuration
Options: 1–8
Encoder Name: Name of encoder
Options: AVC, HEVC
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Xilinx Zynq UltraScale+ Specifications

General

Manufacturer	Xilinx
Model	Zynq UltraScale+
Category	SoC
Processor Cores	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
FPGA Fabric	UltraScale+ FPGA
Memory Interfaces	DDR4, DDR3, LPDDR3, LPDDR4
Connectivity	Gigabit Ethernet, USB 3.0, SATA, PCIe
Video Codecs	H.264
Power Consumption	Varies depending on specific device configuration and usage
Operating Temperature	Commercial: 0°C to +85°C, Industrial: -40°C to +100°C