Yamaha CDX-E200 - Integrated Circuit Block Diagrams; IC Block Diagrams and Pin Connections

ABCDEFGH
1
2
3
4
5
6
CDX-E200
■ IC BLOCK
E-24/J-22 E-25/J-23
VCC
E–
C+
NC
OUTPUT
(+5V)
DELAY
RESET OUT
BAL. ADJ.
GND
ON/OFF
E– C–
NC
–VCC
DELAY
CIRCUIT
REFERENCE
REGULATOR
PROTECTION
ON/OFF
CONTROL
REFERENCE
IN
+
+
CURRENT
CONTROL
CURRENT
CONTROL
16 15 12 7
9
10
3
2
4
6
11
8
1
14 13
5
OUTPUT
(–5V)
CURRENT
CONTROL
IC4 : M5290P
Constant-Voltage Tracking Supply with Reset
IC101 : AN8399SA
CD Head Amp
IC1 : AN87855SB
5-Channel Power OP-Amp System Driver
–+
OUT 1
–IN 1
–V CC
+V CC
OUT 2
1
2
3
4
5
+IN 1 –IN 2
+IN 2
– +
6
7
8
IC104 : S-24C01ADP
Electrically Erasable PROM
IC3, 105 : NJM2068D-D
Dual OP-Amp
8
4
5
2
3
7
6
1
VCC
VSS
SDA
SCL
NC
NC
NC
NC
DATA REGISTER
E PROM
32X32
H.V.GENERATION
TIMING &
CONTROL
XDEC
YDEC
WORD
ADDRESS
COUNTER
START
STOP
LOGIC
CONTROL
LOGIC
D
OUT
ACK
32
8
D
OUT
32
5
2
CK
PIN
INC
LOAD
START
CYCLE
2
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
-
+
-
16 10 12 11 18 17 14 13 19 1
4
5
3
6
28 26 25 24
Standby
Band gap
V
CC
/V
REF
Reset Circuit
1.25V
SW
Thermal
Protection
Circuit
IN-
IN+
OUT
VREF
222720
15
2189
IN2+
CH4 SW
IN2-
IN4
IN3
IN1
IN5
SVCC
PGND2
PGND1
STANDBY D2-
D4-
D3- D1- D5-
D2+
D4+ D3+ D1+ D5+ PVCC3 PVCC1 PVCC2
23
7
2
+
–
21
20
+
–
19
+
–
2
1
SUBT
AMP
+
–
GCA BCA
32
31
23
11
16
10
4 5 6 8 9 12 13 14 15
AMP GCA BCA
30
29
AMP GCA BCA
27
AMP GCA BCA
28
SUBT
NRFDET 3TENV
OFTRBDOAGCRF EQ
BAND GAP
22
25 177 3262418
A
C
B
D
E
F
VREF
SLPSW
GCTL
TBAL FBAL
LDRCTL
GND
VCC
CEA
RFN RF OUT RF IN CAGC ARF CBDO BDO COFTR OFTR
3T OUT
NRFDET
FEN
FEOUT
TEN
TE OUT
LD
PD
1SR139-400
1SS133
MTZJ5.1B
MTZJ5.6B
MTZJ30.0B
S-24C01ADP
NJM2068D-D
2SB1565(E,F)
2SD2396(J,K)
2SB544(E,F,G)
2SC2878(A,B)
2SA1267(GR,Y)
2SD1915(F)ST
Anode
Cathode
B
C
E
B
C
E
B
C
E
2SA1708(S,T)
AN8399SA
MN35511AL
32
16
1
17
41
40
21
60
61
80
201
1
4
8
IC301 : LC75710NE
FL Driver
G7 G8 G9 G10 G11 AA8/G12 AA7/G13 AA6/G14 AA5/G15 AA4/G16 AA3 AA2 AA1 AA35 AA34 AA33
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
G6
G5
G4
G3
G2
G1
VFL
TEST
VSS
OSCO
OSCI
VDD
RES
CE
CL
DI
AM32
AM31
AM30
AM29
AM28
AM27
AM26
AM25
AM24
AM23
AM22
AM21
AM20
AM19
AM18
AM17
AM1 AM2 AM3 AM4 AM5 AM6 AM7 AM8 AM9
AM10 AM11 AM12 AM13 AM14 AM15 AM16
ADDRESS
REGISTER
SHIFT
REGISTER
CONTROL
BLINKCYCLE
REGISTER
DISPLAY
REGISTER
DUTYCYCLE
REGISTER
GRID
REGISTER
INSTRUCTION
DECODER
ADDRESS
COUNTER
BLINK
GENERATOR
DISPLAY
CONTROL
DUTY
GENERATOR
GRID
CONTROL
CONTROL
DIVIDER DECODEROSC
TIMING
GENERATOR
LATCH
LATCH
ANODE
DRIVER
GRID
DRIVER
DC RAM
AD
RAM
CG
ROM
CG
ROM
AM1
AM2
AM35
AA1
AA2
AA3
AA4/G16
AA5/G15
AA6/G14
AA7/G13
AA8/G12
G11
G10
G2
G1
DI
CL
CE
VDD
VSS
VFL
RES
TEST
OSC I
OSC O
■ PIN CONNECTION DIAGRAM
M5290P
E
B
C
LC75710NE
µPD78076GF-103-3BA
33
32
17
48
49
64
161
51
50
31
81
80
100
30
1
28
14
1
15
AN8785SB
1
8
16
8