ZiLOG eZ80 User Manual

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
70
OTDR
repeat {
({00h, BC[15:0]})
← (HL)
B ← B – 1
HL ← HL – 1
} while B ≠ 0
ED BB —1—— *—
OTDRX
repeat {
({00h, DE[15:0]})
← (HL)
BC ← BC – 1
HL ← HL – 1
} while BC ≠ 0
ED CB —1—— *—
OTI2R
repeat {
({00h, DE[15:0]})
← (HL)
BC ← BC – 1
DE ← DE+1
HL ← HL+1
} while BC ≠ 0
ED B4 —1—— *—
OTIM
({0000h, C})
← (HL)
B ← B – 1
C ← C+1
HL ← HL+1
ED 83 X*X X *X
OTIMR
repeat {
({ 0000h , C}) ← (HL)
B ← B – 1
C ← C+1
HL ← HL+1
} while B ≠ 0
ED 93 X1X X *X
Table 37. Instruction Summary (Continued)
Instruction and Operation
Address Mode
Opcode(s)
(Hex)
Flags Affected
Dest Source S Z H P/V N C
Note: *This flag value is a function of the result of the affected operation.
— = No Change.
0 = Set to 0.
1 = Set to 1.
V = Set to 1 if overflow occurs.
X = Undetermined.
P = Set to the parity of the result (0 if odd parity, 1 if even parity).
IEF2 = The value of Interrupt Enable Flag 2.

ZiLOG eZ80 Specifications

General

Brand	ZiLOG
Model	eZ80
Category	Computer Hardware
Language	English