AR-B1479 User’s Guide
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2.7 TIMER / COUNTERS
l System Activity Detection.
l Three power down timers.
l Doze timer for detecting lack of system activity for short durations.
l Stand-by timer for detecting lack of system activity for medium durations.
l Suspend timer for detecting lack of system activity for long durations.
l Housekeeping activity detection.
l Housekeeping timer to cope with short bursts of housekeeping activity while dozing or in stand-by state.
2.8 IDE CONROLLER
l Supports PIO.
l Transfer Rates to 22 Mbytes/sec.
l Supports up to 4 IDE devices.
l Concurrent channel operation (PIO modes) –
4 x 32-Bit Buffer FIFOs per channel.
l Support for PIO mode 3 & 4.
l Individual drive timing for all four IDE devices.
l Supports both legacy & native IDE modes.
l Supports hard drive larger than 528MB.
l Support for CD-ROM and tape peripherals.
l Backward compatibility with IDE (ATA-1).
l Drivers for Windows and other Operating Systems.
2.9 OPTIONAL 16-BIT LOCAL BUS INTERFACE
l Multiplexed with ISA/DMA interface.
l Low latency asynchronous bus.
l 22-bit address bus.
l 16-bit data bus with word steering capability.
l Programmable timing (Host clock granularity).
l Two Programmable Flash Chip Select.
l Four Programmable I/O Chip Select.
l Supports 32-bit Flash burst.
l Two-level hardware key protection for Flash boot block protection.
l Supports two banks of 16MB flash devices with boot block shadowed to 0x000F0000.
2.10 ISA MASTER / SLAVE
l Generates the ISA clock from either 14.318 MHz oscillator clock or PCI clock.
l Supports programmable extra wait state for ISA cycles.
l Supports I/O recovery time for back-to-back I/O cycles.
l Fast Gate A20 and Fast reset.
l Supports this single ROM that C, D, or E.
Blocks shares with F block BIOS ROM.
l Supports flash ROM.
l Supports ISA hidden refresh.
l Buffered DMA & ISA master cycles to reduce bandwidth utilization of the PCI and Host bus.
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