Chapter 4 Theory of Operation
Earth-Referenced Logic
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Earth-Referenced Logic
Microprocessor U10 on the bottom board handles GPIB (IEEE-488) control through
bus interface chip U8 and bus receiver/driver chips U6 and U7 on the bottom board.
The RS-232 interface is also controlled through microprocessor U10. RS-232
transceiver chip U12 on the bottom board provides the required level shifting to
approximate ±9 volt logic levels through on-chip charge-pump power supplies using
C11 and C12 on the bottom board. Communication between the earth referenced logic
interface circuits and the floating logic is accomplished through an optically-isolated
bi-directional serial interface. Isolator U2 on the bottom board couples data from U10
to processor U17 on the top board. Isolator U1 on the bottom board couples data from
U17 on the top board to microprocessor U10 on the bottom board.
Front Panel
The front panel circuits consist of vacuum fluorescent display control, display high
voltage drivers, and keyboard scanning. Communication between the front panel and
floating logic circuits is accomplished through a 4-wire bi-directional serial interface.
The main controller U17 can cause a hardware reset to front-panel controller by signal
IGFPRES. The front panel logic operates from -11.4 volts (logic 1) and -16.4 volts
(logic 0). The front panel logic high supply (-11.4 volts) is produced by the -16.4 volts
bias supply and the voltage regulator U2 on the front panel board. The four serial
communication signals are level shifted by the comparator U8 from the floating logic
0 V to 5 V levels to the -16.4 V to -11.4 V levels present on the front panel assembly.
U6 acts as the serial shift register interface for the front-panel controller U7 on the
front panel board.
Display anode and grid voltages are +16.4 volts for an "on" segment and -16.4 volts
for an "off" segment. The -10.2 V cathode bias for the display is provided by filament
winding center tap bias circuit VR3, R43, and C32 on the top board. Keyboard
scanning is accomplished through a conventional scanned row-column key matrix.
Keys are scanned by outputing data at front-panel controller U7 port pins P0.0 through
P0.3 to poll each key column for a key press. Column read-back data are read by the
microprocessor at port pins P1.0 through P1.3 for decoding and communication to
the floating logic circuits.
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