Chapter 3 139
Programming the Status Register System
Status Groups
Data Questionable Power Condition Register
The Data Questionable Power Condition Register continuously monitors the hardware and firmware status
of the signal generator; condition registers are read only.
Data Questionable Power Transition Filters (negative and positive)
The Data Questionable Power Transition Filters specify which type of bit state changes in the condition
register set corresponding bits in the event register. Changes can be positive (0 to 1) or negative (1 to 0).
Data Questionable Power Event Register
The Data Questionable Power Event Register latches transition events from the condition register as
specified by the transition filters. Event registers are destructive read-only: reading data from an event
register clears the contents of that register.
Table 3-8 Data Questionable Power Condition Register Bits
Bit Description
0 Reverse Power Protection Tripped. A 1 in this bit position indicates that the reverse power protection
(RPP) circuit has been tripped. There is no output in this state. Any conditions that may have caused the
problem should be corrected. The RPP circuit can be reset by sending the remote SCPI command:
OUTput:PROTection:CLEar.
1 Unleveled. A 1 in this bit indicates that the output leveling loop is unable to set the output power.
2−14 Unused. These bits are always set to 0.
15 Always 0.
Query: STATus:QUEStionable:POWer:CONDition?
Response: The decimal sum of the bits set to 1
Commands:
STATus:QUEStionable:POWer:NTRansition <value> (negative transition), or
STATus:QUEStionable:POWer:PTRansition <value> (positive transition), where
<value> is the sum of the decimal values of the bits you want to enable.
Queries:
STATus:QUEStionable:POWer:NTRansition?
STATus:QUEStionable:POWer:PTRansition?
Query: STATus:QUEStionable:POWer[:EVENt]?
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