Publication 1763-RM001C-EN-P - October 2009
176 Timer and Counter Instructions
CTD Instruction Counter Control and Status Bits, Counter Word 0
(Data File 5 is configured as a timer file for this example.)
Bit Is Set When: And Remains Set Until One of the Following
Occurs:
bit 11 - C5:0/UN UN - underflow
indicator
the accumulated value wraps from -32,768
to +32,767 and continues to count down
a RES instruction with the same address as the CTD
instruction is enabled
bit 13 - C5:0/DN DN - done
indicator
accumulated value
≥ preset value •accumulated value < preset value or,
•a RES instruction with the same address as the
CTU instruction is enabled
bit 14 - C5:0/CD CD - count down
enable
rung state is true •rung state is false
•a RES instruction with the same address as the
CTD instruction is enabled
efesotomasyon.com - Allen Bradley,Rockwell,plc,servo,drive
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