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Chopper Transistor Voltage Control regulates the voltage of the DC bus
during regeneration. The average values of DC bus voltages are:
• 375V DC (for 240V AC input)
• 750V DC (for 480V AC input)
Voltage dividers reduce the DC bus voltage to a value that is usable in
signal circuit isolation and control. The DC bus feedback voltage from
the voltage dividers is compared to a reference voltage to actuate the
Chopper Transistor.
The Freewheel Diode (FWD), in parallel with the Dynamic Brake
Resistor, allows any magnetic energy stored in the parasitic inductance
of that circuit to be safely dissipated during turn off of the Chopper
Transistor.
Resistor
The Resistor dissipates the regenerated energy in the form of heat. The
PowerFlex Family of Drives can use either the internal dynamic brake
resistor option or an externally mounted dynamic brake resistor wired to
the drive.
The internal resistor kit for the drive may be used for the application if
the required energy, deceleration time, and duty, all are small enough to
be within the capabilities of the resistor.
The internal resistor is protected by drive software so that its duty cycle
capability is not exceeded. The duty cycle is attenuated by the magnitude
of the ‘DB Suppress’ signal coming from the Thermal Model algorithm.
The Thermal Model algorithm uses resistor thermal property constants
to compute DB resistor temperature from applied resistor power that is
computed from knowing the DB transistor duty cycle (DutyDB ). When
the Thermal Model computes that the DB resistor temperature is nearing
the maximum rise allowed, the ‘DB Suppress’ signal begins to rise
reaching full value when maximum temperature rise is reached..
When the internal resistor cannot provide the required braking capability
an external resistor may be supplied by the user that has more capability
A DB Resistance Auto-Detect algorithm is used. This algorithm is
executed as part of the ‘power-up’ diagnostics and is only re-enabled
until the drive is fully powered down again. This algorithm checks that
the resistance measured across the DB terminals of the power board is
within limits that are stored in the power board EEPROM.
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