P54x/EN OP/La4 Operation
(OP) 5-88
MiCOM P543, P544, P545 & P546
OP
I2>2 Start (DDB 568) - 2nd stage started when high
I2>3 Start (DDB 569) - 3rd stage started when high
I2>4 Start (DDB 570) - 4th stage started when high
I2>1 Trip (DDB 571) - 1st stage tripped when high
I2>2 Trip (DDB 572) - 2nd stage tripped when high
I3>3 Trip (DDB 573) - 3rd stage tripped when high
I4>4 Trip (DDB 574) - 4th stage tripped when high
All the above signals are available as DDB signals for mapping in Programmable Scheme
Logic (PSL). In addition the negative sequence overcurrent protection trips 1/2/3/4 are
mapped internally to the block auto-reclose logic.
Negative sequence overcurrent protection starts 1/2/3/4 are mapped internally to the ANY
START DDB signal – DDB 736.
The non-directional and directional operation is shown in the following diagrams:
I2>n Start
I2>n Trip
CTS Block
I2>n Timer Block
Current Above I2>n Setting
I2> Protection Inhibit
&
P1604ENa
&
n = 1, 2, 3, 4
I2>n Start
I2>n Trip
DT-n
0
Figure 59 Negative sequence overcurrent non-directional operation
CTS Block
I2> Start
I2> Timer Block
Current Above I2> Setting
I2> Protection Inhibit
&
P1605ENb
Directional Check
I2> Trip
DT
0
Polarising Voltage Above V2> Setting
Slow VTS Block
&
&
Figure 60 Directionalizing the negative phase sequence overcurrent element
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