APPOTECH CW6632B - Page 41

4 Reset Generation 35
CW6632B Bluetooth 3.0 Audio Player SOC Version 1.0.0
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11 = PLL2
SDADCEN: SDADC clock enable
0 = disable
1 = enable
Register 4-10 PLL1CON – PLL1 Configuration
Position
7
6
5
4
3
2
1
0
Name
Reserved
Reserved
PLL1 AREF_SEL
X12EN
PLL1DEN32K
PLL1DEN
PLL1AEN
Default
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PLL1AEN: PLL analog module enables
0 = Disable
1 = Enable
PLL1DEN: PLL digital module enables
0 = Disable
1 = Enable
When change the divider, also need write 1 to PLLDEN
PLL1DEN32K: PLL digital 32K enable
0 = disable
1 = enable
X12EN: XOSC 12M 374 divider enable bit
0 = Disable
1 = Enable
PLL1AREF_SEL: PLL input reference clock analog select
00 = 12M XOSC
01 = 4M XOSC
10 = 32K XOSC
11 = 32K XOSC
Register 4-11 PLL1DIV – PLL1 clock div for PLL2
Position
7
6
5
4
3
2
1
0
Name
PLL1DIV
Default
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PLL1IDV Clock = 48MH/PLL1DIV;
Register 4-12 PLL1INT – PLL1 integer low
Position
7
6
5
4
3
2
1
0
Name
PLL1INT
Default
0
0
1
0
0
1
1
1