Atari 800

Table
1-1
Memory
Map
Selected
Lines
Signal
-Grd A15
Al*
A13
Active
Pin
-
12
13 14
15
Line
Device
L
L L
L
1-SO
8K RAM
BLOCK
L
L
L H
2 -SI
8K RAM
BLOCK
L
L H
L
3-S2
8K RAM
BLOCK
L
L H
H
*-S3
8K RAM
BLOCK
L H
L
L
5-S*
8K
RAM/CARTRIDGE
L,R
L
H
L H
6-S5
8K
RAM/CARTRIDGE
L
L
H H
L
7
-56
2K
ROM
L
H H
L
7-S6
I/O
DECODER
(Z105)
L
H
H
H
9-S7
*K ROMs
(2-"E" <Jc "A")
I/O
Decoder
The I/O
Decoder
integrated
circuit
(2105) is
a
one-of-eight
decoder
/demultiplexer.
The
I/O
Decoder
is
used
to
select
the
different
output
devices,
such
as
PIA
chip,
^^*^^y/^^P
^^
^^« ^'^*^/*^T^A
chip.
Only
four
of the
possible
output
selections
are
used.
(See
Table
1-2.)
The I/O
Decoder
Is
enabled
by
inputs
on
pins
*,
5,
and
6;
pin *
input
coming
from
the
Memory
Map
Decoder
(S6),
pin 5
input
coming
from the
Address
Bus
and
pin
6
input
coming
from
the
Chip
Select
(CS)
line.
The
Binary
Decode
is
provided
by
the
Address
Bus
(A08,
AQ9
and AlO),
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