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The 16-bit Timer/Counter has improvements that will affect the compatibility in some special
cases.
The following bits are added to the 16-bit Timer/Counter Control Registers:
• COMnC1:0 are added to TCCRnA.
• FOCnA, FOCnB and FOCnC are added to TCCRnC.
• WGMn3 is added to TCCRnB.
Interrupt flag and mask bits for output compare unit C are added.
The 16-bit Timer/Counter has improvements that will affect the compatibility in some special
cases.
13.3 Accessing 16-bit Registers
The TCNTn, OCRnx, and ICRn are 16-bit registers that can be accessed by the AVR CPU via
the 8-bit data bus. The 16-bit register must be byte accessed using two read or write operations.
Each 16-bit timer has a single 8-bit register for temporary storing of the high byte of the 16-bit
access. The same temporary register is shared between all 16-bit registers within each 16-bit
timer. Accessing the low byte triggers the 16-bit read or write operation. When the low byte of a
16-bit register is written by the CPU, the high byte stored in the temporary register, and the low
byte written are both copied into the 16-bit register in the same clock cycle. When the low byte of
a 16-bit register is read by the CPU, the high byte of the 16-bit register is copied into the tempo-
rary register in the same clock cycle as the low byte is read.
Not all 16-bit accesses uses the temporary register for the high byte. Reading the OCRnx 16-bit
registers does not involve using the temporary register.
To do a 16-bit write, the high byte must be written before the low byte. For a 16-bit read, the low
byte must be read before the high byte.
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