H61MGC/H61MLC UEFI BIOS Manual
17
3 Chipset Menu
This section describes configuring the PCI bus system. PCI, or Personal Computer
Interconnect, is a system whic h allows I/O devic es to operate at sp eeds nearing the
speed of the CPU itself uses when communicating with its own special components.
Notice
z Beware of that setting inappropriate values in items of this menu may cause
system to malfunction.
BIOS SETUP UTILIT
> Onboard PCI-E Devices
> South Bridge
> North Bridge
Version x.xx.xxxx. Copyright© 201x, American Megatrends, Inc.
North Bridge Parameters
Main Advanced Chipset Boot Security Performance Save & Exit
Select Screen
Select Item
Select
Change Opt.
General Help
Optimized Defaults
Save & Reset
Exit
Enter
+/-
F1
F3
F4
ESC
North Bridge
BIOS SETUP UTILIT
VT-d [Di sabled]
Initate Graphic Adapter [PE G/IGD]
IGD Memory [64 M]
Render Standby [En abled]
IGD Multi-Monitor [Di sabled]
DVMT Mode Select [DV MT Mode]
DVMT/FIXED Memory [25 6MB]
PCI Express Port [Au to]
PEG Force Gen1 [Di sabled]
Detect Non-Compliance Device [Enabled]
Memory Information
Total Memory
DDR3_A1
DDR3_B1
Low MMIO Align [10 24M]
Version x.xx.xxxx. Copyright© 201x, American Megatrends, Inc.
Low MMIO resources align at
64MB/1024MB
Chipset
Select Screen
Select Item
Select
Change Opt.
General Help
Optimized Defaults
Save & Reset
Exit
Enter
+/-
F1
F3
F4
ESC