Bose CD-20 - Page 64

64
CD MECHANISM IC PIN CONFIGURATION TABLES
Pin
No.
I/O Terminal
Name
Description
43 O SCOR Outputs high signal when either
subcode sync S0 or S1 is detected.
44 NC
45 NC
46 O SQSO SubQ 80-bit serial output.
47 I SQCK SQSO readout clock input.
48 I Mute High: mute; low: release
49 O SENS SENS output to CPU.
50 I XRST System reset. Reset when low.
51 I Data Serial data input from CPU.
52 I XLAT Latch input from CPU. Serial data is
latched at the falling edge.
53 I CLOCK Serial input from SSP.
54 I SEIN Sense input from SSP.
55 I CNIN Track jump count signal input.
56 O DATO Serial data output to SSP.
57 O XLTO Serial data latch output to SP. Latched
at the falling edge.
58 - Vdd Power supply (+5V).
59 O CLKO Serial data transfer clock output to
SSP.
60 I SPOA Microcomputer extended interface
(input A).
61 I SPOB Microcomputer extended interface
(input B).
62 I SPOC Microcomputer extended interface
(input C).
63 I SPOD Microcomputer extended interface
(input D).
64 NC
IC 821 (CXA1782BQ) Servo Signal Processor RF Amplifier Table
Pin
No.
I/O Terminal
Name
Description
1 I FEO Focus error amplifier output. Connected
internally to the FZC comparator input.
2 I FEI Focus error input.
3 I FDFCT Capacitor connection pin for defect time
constant.
4 I FGD Ground this pin through capacitor when
decreasing the focus servo high-
frequency gain.
5 I FLB External time constant setting pin for
increasing the focus servo low
frequency.
6 O FE_O Focus drive output.
7 I FE_M Focus amplifier negative input pin.
8 I SRCH External time constant setting pin for
generating focus servo wave form.
9 I TGU External time constant setting pin for
switching tacking high-frequency gain.
10 I TG2 External time constant setting pin for
11 I FSET High cut off frequency setting pin for
focus and tracking phase compensation
amplifier.
IC 801 (CXD2517Q) Digital Signal Processor Table (continued)