65
CD MECHANISM IC PIN CONFIGURATION TABLES
Pin
No.
I/O Terminal
Name
Description
12 I TA_M Tracking amplifier negative input pin.
13 O TA_O Tracking drive output
14 I SL_P Sled amplifier non-inversed input.
15 I SL_M Sled amplifier negative input pin.
16 O SL_O Sled drive output.
17 I ISET Setting pin for focus search, Track
jump, and sled kick current.
18 NC
19 I CLK Serial data transfer clock input from
CPU. (no pull up resistance)
20 I XLT Latch input from CPU.
(no pull up resistance)
21 I DATA Serial data input from CPU.
(no pull up resistance)
22 I XRST Reset input; resets at low.
(no pull up resistance)
23 O C.OUT Track number count signal output.
24 O SENS Outputs FZC; DFCT.TZC. gain,
balance and others according to the
command from CPU.
25 O FOK Focus OK comparator output.
(DC voltage: 10kΩ load resistance is
connected)
26 O CC2 Input pin for the DEFECT bottom hold
output capacitance-coupled.
27 I CC1 DEFECT bottom hold output.
28 I CB Connection pin for DEFECT bottom
hold capacitor.
29 I CP Connection pin for MIRR hold
capacitor. MIRR comparator non-
inversed input.
30 I RF_I Input pin for the RF summing amplifier
output capacitance-coupled
31 O RF_O RF summing amplifier output. Eye
pattern check point.
32 I RF_M RF summing amplifier inversed input.
The RF amplifier gain is determined by
the resistance connected between this
pin and RFO pin.
33 O LD APC amplifier output.
34 I PHD APC amplifier input.
35 I PHD1 Rf I-V amplifier inversed input. Connect
these pins to the photo diode A+C and
B+C pins.
36 I PHD2 RF I-V amplifier inversed input.
Connect these pins to the photo diode
A+C and B+D pins.
37 I FE_BIAS Bias adjustment of focus error amplifier.
38 I F F I-V and E I-V amplifier inversed input.
Connect these pins to photo diodes F
and E.
39 I E F I-V and E I-V amplifier inversed input.
Connect these pins to photo diodes F
and E.
IC 821 (CXA1782BQ) Servo Signal Processor RF Amplifier Table (continued)