Casio 120CR - Data Communication between CPU and EEPROM

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5-3. Data communication between CPU and EEPROM (NOT USED FOR USA MODEL)
CS : Chip enable
SK : Sirial data clock
DI : Serial data input
DO : Serial data outpu
EEPROM is a memory to possible write/erase by electricity .
The BR93LC46A privides efficient nonvolatile read/write memory arranged as 64 registers of 16
bits each.
(64 words X 16 bits = 1024 bits)
[Block diagram]
CS Command code
controller
Power detection
Address
buffer
Data
register
Address
decorder
1024 bit
EEPROM array
R/W
amplifer
Write
protection
6 bits
6 bits
16 bits
16 bits
High voltage
genarator
Command
register
Dammy bit
Clock generator
SK
DI
DO
1
2
3
4
CS
SK
DI
DO
Pin No.23
Pin No.14
Pin No.15
Pin No.16
EEPROMCPU
BR93LC46A