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Celestica A2210 - Page 75

Celestica A2210
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Pin Name Description Pin Name Description
B28 GND Ground A28 AD22 Address/Data 22
B29 AD21 Address/Data 21 A29 AD20 Address/Data 20
B30 AD19 Address/Data 19 A30 GND Ground
B31 +3.3V +3.3 VDC A31 AD18 Address/Data 18
B32 AD17 Address/Data 17 A32 AD16 Address/Data 16
B33 C/BE2_L Command, Byte Enable 2 A33 +3.3V +3.3 VDC
B34 GND13 Ground A34 FRAME_L Address or Data phase
B35 IRDY_L Initiator Ready A35 GND Ground
B36 +3.3V +3.3 VDC A36 TRDY_L Target Ready
B37 DEVSEL_L Device Select A37 GND Ground
B38 GND Ground A38 STOP_L Stop Transfer Cycle
B39 LOCK_L Lock bus A39 +3.3V +3.3 VDC
B40 PERR_L Parity Error A40 SMBCLK
B41 +3.3V +3.3 VDC A41 SMBDAT
B42 SERR_L System Error A42 GND Ground
B43 +3.3V +3.3 VDC A43 PAR Parity
B44 C/BE1_L Command, Byte Enable 1 A44 AD15 Address/Data 15
B45 AD14 Address/Data 14 A45 +3.3V +3.3 VDC
B46 GND Ground A46 AD13 Address/Data 13
B47 AD12 Address/Data 12 A47 AD11 Address/Data 11
B48 AD10 Address/Data 10 A48 GND Ground
B49 GND Ground A49 AD9 Address/Data 9
B50 (KEY) A50 (KEY)
B51 (KEY) A51 (KEY)
B52 AD8 Address/Data 8 A52 C/BE0_L Command, Byte Enable 0
B53 AD7 Address/Data 7 A53 +3.3V +3.3 VDC
B54 +3.3V +3.3 VDC A54 AD6 Address/Data 6
B55 AD5 Address/Data 5 A55 AD4 Address/Data 4
B56 AD3 Address/Data 3 A56 GND Ground
B57 GND Ground A57 AD2 Address/Data 2
B58 AD1 Address/Data 1 A58 AD0 Address/Data 0
B59 VDD +5 VDC A59 +5V +V I/O (+5 V)
B60 ACK64 Acknowledge 64 bit A60 REQ64 Request 64 bit
B61 VDD +5 VDC A61 VDD +5 VDC
B62 VDD +5 VDC A62 VDD +5 VDC
Appendix - 17

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