EasyManuals Logo

Clevo PA71HS User Manual

Clevo PA71HS
136 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #62 background imageLoading...
Page #62 background image
Schematic Diagrams
B - 6 Processor 4/6
B.Schematic Diagrams
Processor 4/6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NEAR CPU
CAD Note: Capacitor need to be placed
close to buffer output pin
CFG7
DEFENSIVE PULL DOWN SITE
1: (Default) PEG Train immediately following xxRESETB de assertion
0: PEG Wait for BIOS for training
CFG4
1: DISABLED;
NO PHYSICAL DISPLAY PORT ATTACHED
TO EMBEDDED DISPLAY PORT
0: ENABLED;
AN EXTERNAL DISPLAY PORT DEVICE
IS CONNECTED TO THE EMBEDDED
DISPLAY PORT
DISPLAY PORT PRESENCE STRAP
CFG2
1: (DEFAULT)NORMAL OPERATION;
LANE# DEFINITION MATCHES
SOCKET PIN MAP DEFINITION
0: LANE REVERSAL
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PCIE PORT BIFURCATION STRAPS
TO EC
VCCST_PWRGD
CFG[0]: Stall reset sequence after PCU
Ʉ
ɄɄ
Ʉ
PLL lock until de-asserted:
— 1 = (Default) Normal Operation;
No stall.
— 0 = Stall.
CFG[1]: Reserved configuration lane.
Ʉ
ɄɄ
Ʉ
CFG[2]: PCI Express* Static x16 Lane
Ʉ
ɄɄ
Ʉ
Numbering Reversal.
— 1 = Normal operation
— 0 = Lane numbers reversed.
CFG[3]: Reserved configuration lane.
Ʉ
ɄɄ
Ʉ
CFG[4]: eDP enable:
Ʉ
ɄɄ
Ʉ
— 1 = Disabled.
— 0 = Enabled.
CFG[6:5]: PCI Express* Bifurcation
Ʉ
ɄɄ
Ʉ
— 00 = 1 x8, 2 x4 PCI Express*
— 01 = reserved
— 10 = 2 x8 PCI Express*
— 11 = 1 x16 PCI Express*
CFG[7]: PEG Training:
Ʉ
ɄɄ
Ʉ
— 1 = (default) PEG Train
immediately following RESET# de
assertion.
— 0 = PEG Wait for BIOS for
training.
CFG[19:8]: Reserved configuration
Ʉ
ɄɄ
Ʉ
lanes.
H_PROCHOT_EC
H_PROCHOT#_RH_PROCHOT#
H_PM_DOWN_R
H_SKTOCC_N
PROC_SELECT#
CFG_RCOMP
CPU_VIDALERT_N
SKL_XDP_MBP_0
SKL_XDP_MBP_1
SKL_MBP_2
SKL_MBP_3
H_TDO
H_TCK
H_TRST#
H_PREQ#
H_PRDY#
CFG4
VCCST_PWRGD_CPU
H_PROCHOT#
H_TDO
H_TCK
H_PECI_R
VCCST_PWRGD
VCCST_PWRGD
H_SKTOCC_N
CFG2
1.0V_VCCST
1.0DX_VCCSTG
1.0V_VCCST
1.0V_VCCST
VDD3
3.3VA
H_PROCHOT#[57]
PCH_PECI[31]
PCH_CPU_BCLK_R_DN[31]
PCH_CPU_BCLK_R_DP[31]
PCH_CPU_PCIBCLK_R_DN[31]
PCH_CPU_PCIBCLK_R_DP[31]
CPU_24MHZ_R_DN[31]
CPU_24MHZ_R_DP[31]
H_PWRGD[32]
PLTRST_CPU_N[31]
H_PM_SYNC[31]
H_PM_DOWN[31]
PCH_THERMTRIP#[31]
H_SKTOCC_N[32]
H_CPU_SVIDCLK[57]
H_CPU_SVIDDAT[57]
H_CPU_SVIDALRT#[57]
H_TRST# [34]
H_PREQ# [34]
H_PRDY# [34]
H_PROCHOT_EC[35]
H_PECI[35]
ALL_SYS_PWRGD[10,34,35,57]
DDR_VTT_PG_CTRL[55]
1.0DX_VCCSTG[6,51]
VDD3[26,30,31,32,33,34,35,37,38,48,49,50,51,52,53,54,56,59,60]
VCCIO[2,3,6,56]
1.0V_VCCST[6,31,32,56,57]
3.3VA[30,31,32,33,34,50]
Title
Size Document Number Rev
Date: Sheet
of
6-71-PA700-D02A
D02A
[05]Processor 4/6-CLK/JTAG/MISC
A3
577Wednesday, July 05, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number Rev
Date: Sheet
of
6-71-PA700-D02A
D02A
[05]Processor 4/6-CLK/JTAG/MISC
A3
577Wednesday, July 05, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number Rev
Date: Sheet
of
6-71-PA700-D02A
D02A
[05]Processor 4/6-CLK/JTAG/MISC
A3
577Wednesday, July 05, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
C392
*0.1u_10V_X7R_04
C389
*0.01u_16V_X7R_04
R650 1K_04
SKYLAKE_HALO
BGA1440
?
U34E
SKL_H_CPU
PROC_SELECT#
BN1
CATERR#
BM30
SKTOCC#
BR33
PM_DOWN
BP31
PM_SYNC
BM34
RESET#
BP35
PROCPWRGD
BT31
VCCST_PWRGD
H13
CFG[17]
BN23
CFG[15]
BT19
CFG[16]
BP23
CFG[11]
BT22
CFG[12]
BM19
CFG[10]
BT23
CFG[9]
BR22
CLK24N
D31
CFG[1]
BN27
CFG[3]
BN28
CFG[18]
BN22
PROC_TDI
BL32
CFG[0]
BN25
CFG[2]
BN26
CFG[4]
BR20
CFG[6]
BT20
CFG[5]
BM20
CFG[7]
BP20
CFG[8]
BR23
CFG[13]
BR19
CFG[14]
BP19
CFG[19]
BP22
PROC_PREQ#
BL30
PROC_PRDY#
BP27
VIDSCK
BH32
PROC_TDO
BT28
CLK24P
E31
PCI_BCLKN
C36
PCI_BCLKP
D35
BCLKN
A32
VIDSOUT
BH29
PROCHOT#
BR30
DDR_VTT_CNTL
BT13
CFG_RCOMP
BT25
PROC_TRST#
BP30
PROC_TCK
BR28
PROC_TMS
BP28
VIDALERT#
BH31
THERMTRIP#
J31
PECI
BT34
BCLKP
B31
BPM#[0]
BR27
BPM#[1]
BT27
BPM#[2]
BM31
BPM#[3]
BT30
R285
220_04
R649
*100K_04
C970
47p_50V_NPO_04
R184 60.4_1%_04
R660 1K_04
R651
49.9_1%_04
R659 499_1%_04
S
D
G
Q17A
MTDK3S6R
2
61
R295 20_1%_04
R656 100K_04
R296 51_04
S
D
G
Q17B
MTDK3S6R
5
34
Q51
2SK3018S3
G
DS
R283
100_04
R292
56.2_1%_04
R655 51_04
R167
100K_04
R657 *0402_short
R171 0_04
R163
1K_04
R658 *12.1_1%_04
Sheet 5 of 77
Processor 4/6

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Clevo PA71HS and is the answer not in the manual?

Clevo PA71HS Specifications

General IconGeneral
BrandClevo
ModelPA71HS
CategoryLaptop
LanguageEnglish

Related product manuals