Clevo PA71HS User Manual

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Close to Display PORT
mini-Display Port E (back)
ᶵ⎗ⷞ
SY6288DAAC
㚫㺷暣
DP ESD W/O LEVELSHIFT 暨ᶲ , NET ⎗ SWAP
3/18
㍉岤⺢嬘ἧ䓐 20KV ESD
PLEASE CLOSE TO CONNECTOR
Close to Display PORT
inductor for EMI
CO-LAY NV TO CONN ᶲẞ
⛐ dGPU 㗪 DDC /
AUX
㗗 Multiplax
PIN
TO DP_E
Close to Display PORT
CO-LAY
frome PS8338B
frome NV
TO PS8330B
D02_0307_WEY
CO-LAY
TO PS8338
冯 R830 嶇 R831 CO-LAY
D_MDP_E1
D_MDP_E#1
D_MDP_E0
D_MDP_E#0
D_MDP_E2
D_MDP_E#2
D_MDP_E3
D_MDP_E#3
D_MDP_E2J
D_MDP_E#2J
D_MDP_E3J
D_MDP_E#3J
D_MDP_E1J
OUT1_HPD
D_MDP_E#0J
MDP_AUX#_SDA
MDP_AUX_SCL
D_MDP_E#1J
D_MDP_E0J
OUT1_CA_DET
D_MDP_E#0J
D_MDP_E0J
D_MDP_E#0_L
D_MDP_E0_L
D_MDP_E#3J
D_MDP_E3J
D_MDP_E2J
D_MDP_E#2J
D_MDP_E2_L
D_MDP_E#2_L
D_MDP_E3_L
D_MDP_E#3_L
D_MDP_E#1J
D_MDP_E1J
D_MDP_E#1_L
D_MDP_E1_L
G_MDPE_CEC
D_MDP_E#0 D_MDP_E#0_L
D_MDP_E0_L
D_MDP_E2
D_MDP_E#3
D_MDP_E#2
D_MDP_E#1
D_MDP_E3
D_MDP_E0
D_MDP_E1
D_MDP_E3_L
D_MDP_E#3_L
D_MDP_E2_L
D_MDP_E1_L
D_MDP_E#2_L
D_MDP_E#1_L
G_DP_MODE_R
MDP_E_AUX#_SDA_R
MDP_E_AUX_SCL_R
OUT1_HPD
D_MDP_E1
D_MDP_E#1
D_MDP_E0
D_MDP_E#0
D_MDP_E2
D_MDP_E#2
D_MDP_E3
D_MDP_E#3
OUT1_CA_DET
MDP_AUX#_SDA
MDP_AUX_SCL
MDP_AUX#_SDA
MDP_AUX_SCL
IN_CA _D ET
MDP_PWR
MDP_PWR
3.3VS
5VS
5VS
MDP_PWR
MDP_PWR
NV3V3
EMI_GND
EMI_GND
EMI_GND
EMI_GND
5VS
MDP_PWR
SUSB[12,13,49,50,55]
5VS[10,12,13,36,39,40,41,47,48,49,50,61,62,63,64]
3.3VS[3,8,9,10,12,13,26,30,31,32,33,34,35,36,37,38,39,41,43,46,47,48,49,50,57,64]
NV3V3[12,13,14,26,46,52,53,61,62]
OUT1_CA_DET[46]
OUT1_HPD [46]
OUT1_D0n[46]
OUT1_D0p[46]
OUT1_D1n[46]
OUT1_D1p[46]
OUT1_D2n[46]
OUT1_D2p[46]
OUT1_D3n[46]
OUT1_D3p[46]
VCC3V3_S0_SYS[42,43]
MDP_E#0_R[46]
MDP_E0_R[46]
MDP_E#1_R[46]
MDP_E1_R[46]
MDP_E#2_R[46]
MDP_E2_R[46]
MDP_E#3_R[46]
MDP_E3_R[46]
MDP_E_HPD[26,32,46]
OUT1_AUXn_SDA[46]
OUT1_AUXp_SCL[46]
MDP_E_AUX#_SDA[25,46]
MDP_E_AUX_SCL[25,46]
IN_CA _D ET[46]
Title
Size Document Number Rev
Date: Sheet
of
D02A
[11] MINI DP PORT(BACK)_E
A3
11 77Wednesday, July 05, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
6-71-PA700-D02A
Title
Size Document Number Rev
Date: Sheet
of
D02A
[11] MINI DP PORT(BACK)_E
A3
11 77Wednesday, July 05, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
6-71-PA700-D02A
Title
Size Document Number Rev
Date: Sheet
of
D02A
[11] MINI DP PORT(BACK)_E
A3
11 77Wednesday, July 05, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
6-71-PA700-D02A
R683 *0_04
C968 0.1u_10V_X7R_04
R627
100K_1%_04
C613
0.01u_50V_X7R_04
C1003 0.1u_10V_X7R_04
U41
uP7549UMA5-20
PCB Footprint = M-SOT23-5
VOUT
1
VIN
5
GND
2
EN#
4
OC#
3
R641 *0_04
C977 0.1u_10V_X7R_04
C942
10u_6.3V_X5R_06
R335 5.1M_04
D31
BAV99 RECTIFIER
W/O TBT
A
C
AC
C969 0.1u_10V_X7R_04
R685 *0_04
R674 *0_04
R643 0_04
W/O TBT
C1009 0.1u_10V_X7R_04
R829 0_04
W/O TBT
C976 0.1u_10V_X7R_04
R828 0_04
W/O TBT
L29 FCM1005KF-121T03
W/O TBT
Q48
2SK3018S3
W/O TBT
G
DS
R633
10K_04W/O TBT
L32
*DVI2012F2SF-900T05_08-SHORT
1
4
2
3
L33
*DVI2012F2SF-900T05_08-SHORT
1
4
2
3
R625
*0_04
C959
10u_6.3V_X5R_06
C958
220p_50V_NPO_04
W/O TBT
12
20
13
15
10
8
4
3
16
2
6
14
18
1
5
7
9
11
19
17
COMMON
C17722-120A9-L
J_MDP1
PCB Footprint = C17722-120XX-L
P/N = 6-21-14Q00-020
1
GND
HPD
2
3
LANE_0P
4
CONFIG1 LANE_0N
5
6
CONFIG2
7
GND
GND
8
9
LANE_1P
10
LANE_3P LANE_1N
11
12
LANE_3N
GND
13
GND
14
15
LANE_2P
AUX_CHP
16
17
LANE_2N
18
AUX_CHN
GND
19
PWR
20
SHIELD6
GND4
SHIELD5
GND3
GND2
SHIELD2
GND1
SHIELD1
Q47
2SK3018S3
W/O TBT
G
DS
R653 *0_04
Q49
BTN3904
M-SOT23-CBE
W/O TBT
B
E C
R359
*10K_04
TBT
D33
TVUDF1004AD0
W/O TBT
5
1
2
3
4
10
9
8
7
6
R611
10K_04
W/O TBT
C960 0.1u_10V_X7R_04
R824
0_04
W/O TBT
S D
G
Q22A
MTDK3S6R
W/O TBT
2
6 1
L27
*DVI2012F2SF-900T05_08-SHORT
1
4
2
3
C988 0.1u_10V_X7R_04
R825
0_04
W/O TBT
R336
1M_04
R638
10K_04
W/O TBT
Q64
2SK3018S3
W/O TBT
G
DS
C926 0.1u_10V_X7R_04
W/O TBT
S D
G
Q22B
MTDK3S6R
W/O TBT
5
34
R663 *0_04
C953 0.1u_10V_X7R_04
R815
100K_04
W/O TBT
R358
10K_04
W/O TBT
C961 0.1u_10V_X7R_04
EMR8 0_04
L34
*DVI2012F2SF-900T05_08-SHORT
1
4
2
3
C922 0.1u_10V_X7R_04
W/O TBT
C982 0.1u_10V_X7R_04
S D
G
Q21A
MTDK3S6RW/O TBT
2
6 1
R826 0_04
TBT
C989 0.1u_10V_X7R_04
R645 *0_04
R668 *0_04
EMR5 0_04
C1002 0.1u_10V_X7R_04
R628
100K_1%_04
A A
C
D30
BAT54CWH
W/O TBT
1 2
3
D35
TVUDF1004AD0
W/O TBT
5
1
2
3
4
10
9
8
7
6
C954 0.1u_10V_X7R_04
R827 0_04
TBT
S D
G
Q21B
MTDK3S6R
W/O TBT
5
34
C1008 0.1u_10V_X7R_04
C983 0.1u_10V_X7R_04
Sheet 11 of 77
Mini DP Port (Back)
Schematic Diagrams
B - 12 Mini DP Port (Back)
B.Schematic Diagrams
Mini DP Port (Back)

Clevo PA71HS Specifications

General

Brand	Clevo
Model	PA71HS
Category	Laptop
Language	English