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CMOSTEK CMT2300A - 2 Supper Low Power(SLP) Receiving Mode; Register Associated with SLP Receiving; Basic Principles of Low Power Transceiver

CMOSTEK CMT2300A
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AN146
Rev 0.9 | Page 13/25
www.cmostek.com
2. Supper Low Power(SLP) Receiving Mode
CMT2300A provides a series of options to help users to achieve the supper low power (SLP) reception
under the different application requirements. These options must be valid when RX_TIMER_EN is set to 1,
that is, when the RX timer is valid. The core content of SLP receiver is how to let the receiver minimize the RX
time without the signal, and appropriately extend the RX time to receive with the signal. Finally, the power
consumption is minimized and the reception effect is stabilized.
2.1 Register associated with SLP receiving
The corresponding RFPDK interface and parameters are as below:
Figure 10. SLP RFPDK Interface
Table 12. SLP Related Parameter
Register Bit RFPDK Parameter
Register Bit
The bit is fixed to 1
RX_AUTO_EXIT_DIS
SLP Mode
RX_EXTEND_MODE<3:0>
The contents and explanations of the register can be seen in the following table.
Table13. Register Located in the Configuration Bank:
Register
Name
Bits
R/W
Bit Name
Function Description
CUS_SYS10
(0x15)
5
RW
RX_AUTO_EXIT_DIS
The bit is fixed to 1
3:0
RW
RX_EXTEND_MODE<3:0>
Define the 14 supper low power (SLP)
receiving patterns. See the following
sections for understanding.
2.2 Basic Principles of Low Power Transceiver
The traditional short distance wireless transceiver system usually achieves the low power transceiver in
the following basic method. CMT2300A is also compatible with this method, and on this basis, expands 13
more power saving solutions. Let's first introduce the most basic solution that can be implemented when
RX_EXTEND_MODE<3:0> is set to 0.

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