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CMOSTEK CMT2300A - RSSI Contrast; Phase Jump Detector (PJD)

CMOSTEK CMT2300A
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AN146
Rev 0.9 | Page 16/25
www.cmostek.com
output
1 Determine whether there is a signal by
comparing RSSI.
2Option 0 and option 1 are both met at the
same time..
3NA
Only select option 1 in OOK mode.
CUS_SYS12
(0x17)
7:6
RW
PJD_WIN_SEL<1:0>
This parameter defines how many hops the
PJD needs to detect before deciding whether
the incoming signal is noise or signal.
04 inverts
16 inverts
28 inverts
3: 10 inverts
2.3.2 RSSI Contrast
This function will be described in detail in the next chapter "RSSI measure and contrast". Here's a brief
introduction. The principle of doing RSSI contrast is that the RSSI of the signal or noise is higher than the
threshold, and the RSSI_VLD will be valid, otherwise it will not be valid. The advantage of this method is both
available for FSK and OOK mode. The disadvantage is that the threshold setting needs to be debugged
according to the actual application environment, and avoid being triggered by the noise and interference
signal as much as possible. It is not particularly advantageous to generate RSSI_VLD to assist SLP in this
way, so we are primarily concerned with the following PJD method.
2.3.3 Phase Jump Detector (PJD)
PJD is a new technology. When the chip is FSK demodulated, it is possible to determine whether the
incoming signal is the noise or the useful signal by observing the jump characteristics of the received signal.
PJD thinks that switching the input signal from 0 to 1 or from 1 to 0 is a phase jump. The user just needs to
configure the PJD_WIN_SEL<1:0> to tell the PJD how many times the signal jump needs to be detected
before outputting the result.
2
SYM
2
SYM
1
SYM
1
SYM
1
SYM
1
SYM
Figure 14. Received Signal Jump Diagram
As shown above, a total of 8 symbols are received, but the jump occurs only 6 times, so jump variables
are not equal to the number of symbol. The jump variable is equal to the symbol number only when the
preamble is received. Pay attention to this when the user sets up.
The following chapter will discuss how the RSSI_VLD signal assists to implement the supper low power
(SLP) receiving mode. In general, the more times the PJD inverts, the more reliable the judgment is; the less it

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