CMOSTEK CMT2300A - SLP Pattern 0

AN146
Rev 0.9 | Page 18/25
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Table 17. SLP 14 Patterns
No.
RX Extension Way
RX Extension Condition
0
If configured as 0, no extension is made.
Leave the RX as soon as the T1 timer is
over.
None
1
Leave T1 once the detection conditions are
met within T1. And give the control to MCU.
RSSI_VLD is valid
2
PREAM_OK is vallid
3
RSSI_VLD and PREAM_OK are both valid.
4
As long as RSSI is detected within T1, exit
from T1 and remain in RX until RSSI is not
satisfied, and then exit RX
RSSI_VLD is valid.
5
Switch to T2 once the detection conditions
are met within T1. Exit from RX after the T2
timer is over.
RSSI_VLD is valid.
6
PREAM_OK is valid.
7
RSSI_VLD and PREAM_OK are both valid.
8
PREAM_OK or SYNC_OK, any one is valid.
9
PREAM_OK or NODE_OK, any one is valid.
10
PREAM_OK, SYNC_OK or NODE_OK, any one
is valid.
11
Switch to T2 once the detection conditions
are met within T1. Exit from T2 once SYNC
is detected within T2. And give the control to
MCU. Otherwise, exit from RX after the T2
timer is over.
RSSI_VLD is valid
12
PREAM_OK is valid
13
RSSI_VLD and PREAM_OK are both valid.
Among the 14 patterns described above, there are several uses of RSSI_VLD as trigger conditions.
Using the RSSI_VLD generated by the PJD to assist the supper low power reception is an innovation of
CMT2300A. The effect is very significant. Users are strongly recommended for use. Option 3 combines the
RSSI_VLD generated by PJD and PREAM_OK to make the judgment term. It adds the reliability and doesn't
add much time.
If option 3 is used, assuming that the transmitter sends a long enough preamble, T1 can be set using the
following method:
Set aside 8 symbols for the receiver to do AFC, the PJD invert number is set to 6, the length of preamble
is set to 4 or 8 symbols, and then add the time of 6-8 symbols for detecting whether RSSI_VLD& PREAM_OK
extension conditions are established. So T1's total time is 14 - 16 symbols. If the crystal frequency of the
transmitting and receiving sides has little deviation, for example, it is far less than the set deviation, and then
the AFC time of the previous 8 symbols may be relatively reduced. These need the user to confirm by the
actual test.
2.4.1 SLP Pattern 0
When the pattern is set to 0, the receiving time is equal to RX T1, without any extension. From the