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CMOSTEK CMT2300A - Power Consumption Specification

CMOSTEK CMT2300A
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AN146
Rev 0.9 | Page 5/25
www.cmostek.com
Register
Name
Bits
R/W
Bit Name
Function Description
cost about several milliseconds.
0:Disable
1:Enable
6
RW
LFOSC_CAL1_EN
Enable LFOSC Calibration 1, the calcultion
will only be done once after the power is on
or reset. Ensure that the frequency of the
LFOSC is roughly adjusted to 32 kHz. This
calculation will cost 5 milliseconds.
0:Disable
1:Enable
5
RW
LFOSC_CAL2_EN
Enable LFOSC Calibration 2, the calcultion
will be runing continuously in the RX or TX
status , Ensure that the frequency of the
LFOSC is more accurate adjusted to 32
kHz.. This correction is done in parallel in the
TX or RX status. The enabling condition is
that the LFOSC_CAL1_EN must be enabled.
0:Disable
1:Enable
4
RW
RX_TIMER_EN
Enable RX timer
0:Disable
1:Enable
3
RW
SLEEP_TIMER_EN
Enable SLEEP timer
0:Disable
1:Enable
2
RW
TX_DC_EN
Enable TX Duty Cycle
0:Disable
1:Enable
1
RW
RX_DC_EN
Enable RX Duty Cycle
0:Disable
1:Enable
0
RW
DC_PAUSE
Suspend Duty Cycle
0:NO suspend
1:Suspend
CUS_SYS3
(0x0E)
7
RW
SLEEP_BYPASS_EN
This bit must keep 0.
6:4
RW
XTAL_STB_TIME<2:0>
Crystal stability time:
0:19.5 us
1:39 us
2:78 us
3:155 us
4:310 us
5:620 us
6:1240 us
7:2480 us
3:2
RW
TX_EXIT_STATE<1:0>
Automatically exit to the preset status after
transmitting,it is only valid in the packet
mode. otherwise, the chip will not
automatically exit from the TX status, but
wait for the MCU to send go_* command to
switch.
0:SLEEP
1:STBY
2:TFS