Computex FP-40 - Page 6

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)
5
Signal table
Pin
No.
Signal
Input/
Output
*1
Pin
No.
Signal
Input/
Output
*1
1
VTref
Output
2
[X3.3V]
*5
Input
3
(EX_BSY)
*2
Input
4
GND
5
(EX_NG)
*2
Input
6
GND
7 SWDIO
Input/
Output
8 GND
9
SWCLK
Input
10
GND
11
(EX_STARTn)
*2
Output
12
GND
13
SWO
*3
Output
14
GND
15
SRSTn
Input
16
<EX33_BSY>
*4
Input
17
(EX_OK)
*2
Input
18
<EX33_OK>
*4
Input
19
<EX33_STARTn>
*4
Output
20
[X5V]
*5
Input
*1: Input/output is denoted for the target system.
*2: External input/output function signal that will be at VTref level when high.
This signal is not connected to the target (CPU).
*3: Unused. NC.
*4: 3.3V External input/output function signal. This signal is not connected to
the target (CPU).
*5: Power supply function signal.
Target connection reference diagram
 To prevent malfunction, the length of wirings from the CPU to the target connector should be kept as short as possible.
 If the waveform disturbance exceeds the device specifications, suppress the disturbance by inserting a damping resistor into the signal line or use
other means.