Computex FP-40 - Target Interface Voltage Level; Signal Specifications

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)
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Target interface voltage level
 Input voltage level
Target voltage (V)
5.0V
3.3V
1.8V
VIH(min)
3.5V
2.0V
1.17V
VIL(max)
1.5V
0.8V
0.63V
 Output voltage level
Target voltage (V)
4.5V
3.0V
1.65V
VOH(min)
3.8V
2.4V
1.2V
VOL(max)
0.55V
0.55V
0.45V
Signal specifications
JTAG/SWD signals (TCK, TMS, TDI, TDO, SWDIO and SWCLK)
FP-40 communicates with the on-chip debug unit in the ARM core via the JTAG or SWD connections.
JTAG uses four signal lines - TCK, TMS, TDI and TDO, while SWD required two - SWDIO and SWCLK. The signal
designation may differ slightly depending on the CPU, but generally for CPUs that use both JTAG and SWD, TMS and
SWDIO, TCK and SWCLK use the same terminals.
Make sure to check the specifications of the target CPU before connecting the necessary signals.
Please note that
TRST (reset signal for JTAG) is not used.
SRST signal
SRST signal is used as the reset signal for initializing the CPU from FP-40.
The output from FP-40 is open-collector to allow wired-OR connections on the power-on-reset and system reset signals
on the target.
Please refer to the CPU datasheet, etc., as the CPU may have its own extensions. Please be especially careful with
Renesas CPUs.
TRST signal
Reset signal to initialize the CPU JTAG from FP-40.
If SWD is used, there is no need to connect this signal. Also, with Cortex-M core CPUs, even if you are using JTAG, you
do not need to connect
TRST.
Please refer to the CPU datasheet, etc., for
TRSTconnections, as they may have been uniquely extended by the CPU.
Please be especially careful with Renesas CPUs. The output from the FP-40 is an open collector output to allow wired
OR with the target system's power-on reset or system reset signal.
Since the
TRSTsignals of SWJ-PRB-MIL20-10HP and FP-40 are not connected, it is necessary to make your own cable
for "10-pin connector 1.27mm pitch" connection on CPUs that require
TRST.
VTref signal
Connect the CPU's I/O power to this signal. The valid range should be 1.65V~5.5V.
FP-40 communicates at a signal level that follows the potential connected to this signal. However, some of FP-40 unique
signals are 3.3V dedicated I/F. For specifications, refer to "External I/O functions of FP-40".