Estimated usage of memory and communication resources
Description IX012-010 IX024-010 OX012-010 OX024-010 IOX012-010 IOX024-20
Estimated module bus load (using
default update and 250K bus
speed)
4% 10% 11% 27% 11% 27%
Estimated module bus load (using
70 ms updates and 250K bus
speed)
2% 5% 3% 8% 4% 8%
RAM usage on SC024-110/112,
SC024-120/122
9% 12% 9% 14% 9% 17%
RAM usage on SC050-120/122 1% 1% 1% 2% 1% 2%
RAM usage on SC050-13H 1% 1% 1% 2% 1% 2%
ROM usage on SC024-110/112,
SC024-120/122
8% 11% 12% 18% 10% 20%
ROM usage on SC050-120/122 3% 4% 4% 6% 3% 8%
ROM usage on SC050-13H 2% 2% 2% 3% 2% 4%
Internal processor-to-processor UART
There are two UART channels fully dedicated to diagnostic communication between processors. One
channel is dedicated to processor diagnostics, and the other is dedicated to CAN_1 message send and
receive diagnostics.
The hardware and low-level software provide a basic framework for communication on each channel,
however the specific data structure is not predefined because the data to be transferred is application
dependent.
Baud rate
Up to 7.5 MBps
Termination
N/A
The secondary processor:
•
Has access to all inputs including sensor power and battery measurements, PWM output currents, as
well as one external CAN channel.
•
Can control and check all redundant sourcing output stages.
•
Has access to a digital signal indicating that the internal power supplies are within acceptable limits.
•
Can communicate application specific data through a dedicated serial bus.
•
Has the ability to disable sourcing (disconnect high-side switch) of each output individually in the
event that any of these signals indicates there is a fault condition as defined by the application.
Technical Information
PLUS+1 SC0XX-1XX Controller Family
Controller Area Network specifications
©
Danfoss | June 2016 L1415500 | BC00000235en-US0201 | 17
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