Table 21. Supported memory matrix (continued)
DIMM type Rank Capacity DIMM rated
voltage and
speed
Operating Speed
1 DIMM per
channel (DPC)
2 DIMMs per
channel (DPC)
8 R 128 GB DDR4 (1.2 V), 3200
MT/s
3200 MT/s 2933 MT/s
NOTE: The older 32 GB capacity RDIMM memory with x4 data width and 8Gb DRAM density cannot be mixed with the
newer 32 GB capacity RDIMM memory with x8 data width and 16Gb DRAM density in the same AMD EPYC™ processor
unit.
NOTE: The older 128 GB capacity LRDIMM memory at 2666 MT/s speed cannot be mixed with the new 128 GB capacity
LRDIMM memory at 3200 MT/s speed.
.
General memory module installation guidelines
To ensure optimal performance of the system, observe the following general guidelines when configuring system memory. If
your system's memory configurations fail to observe these guidelines, your system might not boot, stop responding during
memory configuration, or operate with reduced memory. This section provides information on the memory population rules and
about the non-uniform memory access (NUMA) for single or dual processor system.
The memory bus may operate at speeds of 3200 MT/s, 2933 MT/s, or 2666 MT/s depending on the following factors:
● System profile selected (for example, Performance Optimized, or Custom [can be run at high speed or lower])
● Maximum supported DIMM speed of the processors
● Maximum supported speed of the DIMMs
NOTE: MT/s indicates DIMM speed in MegaTransfers per second.
The system supports Flexible Memory Configuration, enabling the system to be configured and run in any valid chipset
architectural configuration. The following are the recommended guidelines for installing memory modules:
● All DIMMs must be DDR4.
● Mixing of memory module capacities in a system is not supported.
● If memory modules with different speeds are installed, they operate at the speed of the slowest installed memory module(s).
● Populate memory module sockets only if a processor is installed.
○ For single-processor systems, sockets A1 to A16 are available.
○ For dual-processor systems, sockets A1 to A16 and sockets B1 to B16 are available.
○ In Optimizer Mode, the DRAM controllers operate independently in the 64-bit mode and provide optimized memory
performance.
Table 22. Memory population rules
Processor Configuration Memory population Memory
population
information
Single processor Optimizer (Independent channel)
population order
A{1}, A{2}, A{3}, A{4}, A{5}, A{6},
A{7}, A{8}, A{9}, A{10}, A{11},
A{12}, A{13}, A{14}, A{15}, A{16}
Odd amount
of DIMMs per
processor allowed.
Table 23. Memory population rules
Processor Configuration Memory population Memory population
information
Single processor Optimizer (Independent
channel) population order
A{1}, A{2}, A{3}, A{4}, A{5},
A{6}, A{7}, A{8}, A{9}, A{10},
A{11}, A{12}, A{13}, A{14}, A{15},
A{16}
Odd amount of DIMMs per
processor allowed.
Component installation guidelines 31
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