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NIP.oN NIP EPYT EMAN NIP FUNCTION DESCRIPTION
Port 0.4 GPIO
8051 P0.4 GPIO.
PINT1.4
This pin also can be configured as the expanded INT1 interrupt.
ADC1
P0.4 I/O, A 28
This pin also can be configured as the input to the ADC channel C by setting ANEN of
IOCFGP0.4 to 1. Only one of ADC1 and ADC2 can be enabled at any one time.
Port 0.3 GPIO
8051 P0.3 GPIO.
PINT1.3
This pin also can be configured as the expanded INT1 interrupt.
ADB2
P0.3 I/O, A 29
This pin also can be configured as the input to the ADC channel B by setting ANEN of
IOCFGP0.3 to 1. Only one of ADB1 and ADB2 can be enabled at any one time.
Port 0.2 GPIO
8051 P0.2 GPIO.
PINT1.2
This pin also can be configured as the expanded INT1 interrupt.
ADB1
P0.2 I/O, A 30
This pin also can be configured as the input to the ADC channel B by setting ANEN of
IOCFGP0.2 to 1. Only one of ADB1 and ADB2 can be enabled at any one time.
Port 0.1 GPIO
8051 P0.1 GPIO.
PINT1.1
This pin also can be configured as the expanded INT1 interrupt.
ADA2
P0.1 I/O, A 31
This pin also can be configured as the input to the ADC channel A by setting ANEN of
IOCFGP0.1 to 1. Only one of ADA1 and ADA2 can be enabled at any one time.
Port 0.0 GPIO
8051 P0.0 GPIO.
PINT1.0
This pin also can be configured as the expanded INT1 interrupt.
ADA1
P0.0 I/O, A 32
This pin also can be configured as the input to the ADC channel A by setting ANEN of
IOCFGP0.0 to 1. Only one of ADA1 and ADA2 can be enabled at any one time.
VSS Power 33 VSS
Internal Regulator Output. 2.25V ~ 2.75V
VDD25 Power 34
Typical decoupling capacitors of 0.1uF and 10uF should be connected between
VDD25 and VSS.
Supply Voltage. 3.0V ~ 5.5V
VDD Power 35
A good decoupling capacitor between VDD and VSS pins is critical for good
performance.
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