Eaton EDR-5000 - Page 636

EDR-5000 IM02602007E
www.eaton.com 636
OR
AND
t-VoltDead
0
MinLiveBusVoltage
MaxDeadBusVoltage
MinLiveLineVoltage
MaxDeadLineVoltage
MaxVoltageDiff
MaxSlipFrequency
MaxAngleDiff
AND
Bus VA Bus VAB Bus VC
Bus VCA
Bus VB Bus VBC
AND
AND AND
t-VoltDead
0
AND
Bypass-I
Bypass= Active
AND AND AND AND
OR
AND
AND
Line VX
LBDL=Active
DBLL =
Active
Main VT con
Ext. Blocked
DBDL=Active
LBDL DBLL DBDL Bypass override
Sync override
LB DB
LBLL
LL
DL
SyncOverridden
VDiffTooHigh
In-Sync Allowed
SlipTooHigh
Sys-in-Sync
AngleDiffTooHigh
Sync=: SyncMode= System2System
Open-Delta
Wye
Voltage difference: Line to Bus
Frequency difference: Line to
Bus Angle difference: Line to Bus
Please Refer to Diagram: Blockings
(Element is not deactivated and no active blocking signals)
2
LiveBus
LiveLine