2.2.1.5 Parallel Interface Circuit
Figure 2-31 shows a circuit block diagram of the parallel interface. Data sent from the host
computer is latched within the E05A93 by the
STROBE signal. The E05A93 outputs a BUSY signal
automatically to stop the host computer from sending additional data. The CPU resets the BUSY
signal after reading the data from the E05A93, so that the printer is ready to receive more data from
the host computer.
Latch
STROBE
BUSY
DATA
E05A93
(IC4)
Figure 2-31. Parallel Interface Circuit
Operating Principles EPL-5500 Service Manual
2-22 Rev. B
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