REV.-A
2.3.7 Parallel Interface Circuit
f
‘:,
Figure 2-26 shows the parallel interface circuit in block diagram form. The /STROBE signal latches the
-
data sent from the host computer in
E05A49.
E05A49
automatically outputs the BUSY signal to stop
the host computer from sending more data. Then it outputs the
/lBF
signal for the CpU. The CpU receives
the \lBF signal via the interrupt signal input port
P82,
recognizes that the printer has received the data
from the host computer, and reads the data latched in the
E05A49.
Then the CPU resets the BUSY signal
so that the printer is ready to receive more data from the host computer.
1-
Parallel l/F
DO-7
DINO-7 DATAO-7
STB
m
STROBE
—+
.-.r-.---_-----
BUSY
-
---
;
BUSY
E05A49
(4B)
DO-7
P82
CPU
(2C)
Figure 2-26. Parallel Interface Circuit
2.3.8 EEPROM Control Circuit
Figure 2-27 shows the EEPROM control circuit in block diagram form. The EEPROM contains information
such as the top-of-form position.
EEPROM is non-volatile memory so information it contains is not lost
when you turn off the printer. Because the
EEPROM is a serial
1/0
device,
E05A49
converts the 8-bit
parallel data that the printer receives from the CPU to serial data.
DATA BUS
SCL
SCK
SDA SDA
CPU
(2C)
EEPROM (5C)
Pv!IL
<:”
~:....
Figure 2-27.
EEPROM
Control Circuit
2-22
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