Espressif Systems ESP User Manual

Chapter 4. Software framework
(continued from previous page)
func: app_main
expression: esp_eth_enable()
ELF file SHA256:␣
,→``597d55ebf237c1cffa5f47c73148a159b22726d94a7b78100bd941d7d5fc906e``
Backtrace: 0x40083cdc:0x3ffb5e80 0x40084143:0x3ffb5ea0␣
,→0x400d32c1:0x3ffb5ec0 0x400d1742:0x3ffb5f20 0x40085d91:0x3ffb5f40
0x40083cdc: invoke_abort at /mnt/hgfs/workspace/esp32/IDF/esp-idf-v3.3/
,→components/esp32/panic.c:715
0x40084143: _esp_error_check_failed at /mnt/hgfs/workspace/esp32/IDF/esp-
,→idf-v3.3/components/esp32/panic.c:721
0x400d32c1: app_main at /mnt/hgfs/workspace/esp32/project/ethernet/main/
,→ethernet_example_main.c:153 (discriminator 1)
0x400d1742: main_task at /mnt/hgfs/workspace/esp32/IDF/esp-idf-v3.3/
,→components/esp32/cpu_start.c:542
0x40085d91: vPortTaskWrapper at /mnt/hgfs/workspace/esp32/IDF/esp-idf-v3.
,→3/components/freertos/port.c:403
Rebooting...
• Please check if there are capacitors on IO0. It is better to have no capacitors on IO0 when it is
used as the CLK output pin, or it would a󰝗ect the timing.
• When GPIO0 starts to output RMII clock, please remember to check the CON-
FIG_PHY_CLOCK_GPIO0_OUT option in Kcon󰝘g.
• For references about Ethernet, besides the README in example, you can also refer to API Ref-
erence.
4.2.3 When using the Ethernet example in ESP-IDF, an error occurred as
“
Timed out
waiting for PHY register 0x3 to have value 0xc0f0 (mask 0xf0). Current value
0x”. How to resolve such issue?
• Please refer to BBS issue and Github issue.
• When the value of the PHY register is 0xFFFF, please check the following:
a. If the wiring of MDIO and MDC is correct
b. If the 50 MHz clock required by RMII is normal
c. If the address of PHY (both software and hardware) is correctly con󰝘gured
• It is strongly recommended to check the strapping pins that control the PHY address to make sure they are not
󰝙oating and not in the default state. Please make sure they have already been pulled up or down by external
resistance.
• If you are still not sure about the PHY address, you can try to set the PHY address from 0 to 31, and read the
PHY ID register to see if you can get the correct data. If yes, then write down the current PHY address.
4.2.4 When using ESP-IDF v4.1, how to set the static IP for ESP32 Ethernet?
Since v4.1 and later versions of ESP-IDF will remove the tcp/ip interface, it is recommended to use the
ESP-NETIF interface.
Code example:
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Espressif Systems ESP Specifications

General

Brand	Espressif Systems
Model	ESP
Category	Motherboard
Language	English