Chapter 4. Software framework
Can I disable the thread scheduling and use a single CPU for ESP32 to realize real-time control of GPIO?
• For now, we do not have any related congurations for SDK to support the single operation of CPU1. Both
cores of ESP32 support SMP only, but not AMP.
• The following solutions can be used to resolve the issue of output waveform being interrupted:
– Use hardware signal outputs, and choose related digital protocols to realize SPI, I2C, I2S and etc. For
special usage with SPI, you can generate waveform using signal output lines.
– See if the hardware RMT can generate the desired waveform with enough length.
– When the hardware interrupt generated corresponding waveform, all callbacks need to be put in IRAM.
– Use the co-processor in the chip as a single chip without an operation system.
What is the turning speed of ESP32 GPIO levels?
It takes around 300 ns.
When certain RTC peripherals (SARADC1, SARADC2, AMP, HALL) are powered on, the inputs of GPIO36
and GPIO39 will be pulled down for approximately 80 ns. How to solve the issue?
For applications that require accurate timing and detecting digital input status, the above problems can be avoided by software:
• Ignore the inputs from GPIO36 and GPIO39 when turning on the power domain of the above
sensors.
• Debounce digital inputs through software. When reading the input states of GPIO36 and
GPIO39, debouncing can be implemented through software by sampling and ltering the
inputs for multiple times, thus reducing misjudgments caused by short voltage drops.
The ESP32 GPIO peripheral may not trigger interrupts correctly if multiple GPIO pads are congured with
edge-triggered interrupts. How to resolve such issue?
• Please search for this question and its answer in ESP32 Series SoC Errata.
Using ESP-WROOM-02D module, can GPIO0, GPIO15, GPIO1 and GPIO3 be used as normal GPIOs?
• Strapping pins (GPIO0 and GPIO15) and download pins (GPIO1 and GPIO3) can be used as normal GPIOs.
• When using the strapping pin as a normal GPIO, you need to pay attention to the level of the strapping pin in
the Flash download mode.
After conguring the GPIO19 for ESP32-C3 as pulled-down input, the level of this pin still stays high. How-
ever other pins in ESP32-C3 does not have this issue. What is the reason?
• In ESP32-C3, GPIO19 is a USB D+ pin, whose pull-up resistor is controlled by the pin’s pull-up value together
with USB’s pull-up value. If any of the two pull-up values is 1, the pin’s pull-up resistor will be enabled.
• The USB pull-up value of GPIO19 is 1 by default, so when the pin is pulled down, GPIO19 still keeps high
level.
• This issue has been xed in the GPIO driver in ESP-IDF v4.4.3 and later versions. For other versions, please
write the register USB_SERIAL_JTAG_DP_PULLUP to 0 for conguration.
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