Espressif Systems ESP User Manual

Chapter 4. Software framework
Why do I get drift (overall drift of the display) when driving an RGB LCD screen?
• Reasons
– PCLK is set to a too big number, and the PSRAM bandwidth is not applicable.
– PSRAM is disabled due to the write operation of 󰝙ash.
• Solutions
– Improve bandwidths of PSRAM and 󰝙ash. You can set 󰝙ash to QIO 120 M and set PSRAM to Octal
120 M.
– Enable CONFIG_COMPILER_OPTIMIZATION_PERF.
– Reduce data_cache_line_size to 32 bytes.
– Enable CONFIG_SPIRAM_FETCH_INSTRUCTIONS and CONFIG_SPIRAM_RODATA.
– Enable CONFIG_LCD_RGB_RESTART_IN_VSYNC. But this operation may cause the screen to 󰝙ash
blurred and drop the frame rate, so we generally do not recommend this way. However, you can try it if
you have interests.
• Applications
– If you need to use Wi-Fi and continuous write operation to 󰝙ash, please use XIP PSRAM + RGB Bounce
buer method, and the settings are as follows:
∗ Make sure the ESP-IDF version is (> 2022.12.12) release/v5.0 and above (released after
2022.12.12), as older versions do not support the XIP PSRAM function.
∗ Verify that whether SPIRAM_FETCH_INSTRUCTIONS and SPIRAM_RODATA can be enabled in
the PSRAM con󰝘guration (too large rodata segment will cause insu󰝚cient space in the PSRAM).
∗ Check if there is any memory (SRAM) left, and it takes about [10 * screen_width * 4] bytes.
∗ Set Data cache line size to 64 Bytes (you can set Data cache size to 32 KB to save memory).
∗ If all the above conditions are met, then you can refer to Documentation to modify the RGB driver
to Bounce buer mode.
∗ If you still have the drift problem when dealing with Wi-Fi, you can try to turn o󰝗 CON-
FIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP in PSRAM, which takes up much SRAM space.
∗ The e󰝗ects of this setting include higher CPU usage, possible interrupt watchdog reset, and higher
memory overhead.
– For the drift caused by short-term operations of 󰝙ash, such as before and after Wi-Fi connection, you can
call esp_lcd_rgb_panel_set_pclk() before the operation to reduce the PCLK (such as 6 MHz) and delay
about 20 ms (the time for RGB to complete one frame), and then increase PCLK to the original level
after the operation. This operation may cause the screen to 󰝙ash blank in a short-term.
– Enable ags.refresh_on_demand in esp_lcd_rgb_panel_cong_t, and manually refresh the screen by call-
ing the esp_lcd_rgb_panel_refresh() interface. In addition, you need to reduce the refreshing frequency
as much as possible while ensuring that the screen does not 󰝙ash blank.
– If unavoidable, you can call the esp_lcd_rgb_panel_restart() interface to reset the RGB timing to prevent
permanent drift.
Why is there vertical dislocation when I drive SPI/8080 LCD screen to display LVGL?
If you use DMA interrupt to transfer data, lv_disp_flush_ready of LVGL should be called after
DMA transfer instead of immediately after calling draw_bitmap.
When I use ESP32-C3 to drive the LCD display through the SPI interface, is it possible to use RTC_CLK as
the SPI clock, so that the LCD display can normally display static pictures in Deep-sleep mode?
• Deep-sleep mode: CPU and most peripherals are powered down, and only the RTC memory is active. For
details, please refer to “Low Power Management”in ESP32-C3 Datasheet.
• The SPI of ESP32-C3 only supports two clock sources, APB_CLK and XTAL_CLK, and does not support
RTC_CLK. Therefore, the LCD screen cannot display static pictures in Deep-sleep mode. For details, please
refer to ESP32-C3 Technical Reference Manual > Reset and Clock [PDF].
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Espressif Systems ESP Specifications

General

Brand	Espressif Systems
Model	ESP
Category	Motherboard
Language	English