Fluke 8846A - How the Meter Processes Output; Triggering Input

8845A/8846A
Programmers Manual
24
Table 5. Description of Bits in ESR and ESE
Bit No. Name True (Set to 1) Conditions
0
1
2
3
4
5
6
7
Operation Complete (OPC)
Not used
Query Error (QYE)
Device-Dependent Error (DDE)
Execution Error (EXE)
Command Error (CME)
Not used
Power On
All commands previous to receipt of an *OPC command
have been executed. Interface is ready to accept another
message.
Always set to zero.
Attempt has been made to read data from the Meter's
output buffer when no output is present or pending.
Possibly a new command line has been received before a
previous query has been read or both input and output
buffers are full.
Incorrect input during calibration, or RS-232 input buffer
overflow.
Command was understood but could not be executed.
Results from, for example, an inappropriate parameter.
Command not executed because it was not understood.
This condition might occur when, for example, a command
sent to the meter contained a syntax error.
Always set to zero.
(PON) Power has been cycled off and on since the last
time the ESR was read or cleared.
Questionable Data Event Register and Questionable Data Enable Register
The Questionable Data Event Register provides information about the Meter’s
measurements. Information such as overload conditions, high/low limits, and whether or
not the Meter is in remote mode or not can be reported through the questionable data
summary bit. Once a bit is set by the Meter, it remains set until it is read from the register
or is cleared. The sixteen bits of the Questionable Data Event Register are described in
Table 6.
The Questionable Data Enable Register determines which of the bits in the Questionable
Data Event Register will be used to the set the Questionable Data Summary bit in the
Meter’s Status Byte. When a bit in the Questionable Data Enable Register is 1, the
corresponding bit in the Questionable Data Event Register is enabled. When any enabled
bit in the Questionable Data Event Register changes from 0 to 1, the Questionable Data
bit in the Status Byte Register also goes to 1. When the Questionable Data Event Register
is read (using the STAT:QUES:EVEN? command) or cleared (using the *CLS
command), the Questionable Data bit in the Status Byte Register returns to 0.