2-1
CHAPTER
2
System Features and Capabilities
This chapter provides information on hardware and domain configuration, resource
management, and reliability, availability, and serviceability (RAS).
■ Section 2.1, “Hardware Configuration” on page 2-1
■ Section 2.2, “Partitioning” on page 2-5
■ Section 2.3, “Resource Management” on page 2-6
■ Section 2.4, “Reliability, Availability, and Serviceability” on page 2-8
2.1 Hardware Configuration
This section describes the hardware configuration. It includes these topics:
■ CPU Module
■ Memory Subsystem
■ I/O Subsystem
■ System Bus
■ System Control
2.1.1 CPU Module
The SPARC Enterprise M4000 server supports up to two CPU modules and the
SPARC Enterprise M5000 server supports up to four CPU modules. The CPU module
consists of two processors per module. The CPU modules are high-performance
multicore processor chips which contain an on-chip secondary cache to minimize
memory latency. These processor chips also support the instruction retry function that
enables continuous processing by retrying instructions when any error is detected.
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