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Furuno FAR-2137S - Page 358

Furuno FAR-2137S
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7.2 Antenna Unit
7-14
Fig. 7.2.9 Block Diagram of IF board
IF signals of 60 MHz from the MIC are separated into the tuning amplifier Q7, 8 and
the IF amplifier on the Q1 side. IF signals are separated at U22 to the video detection
circuit on U3 side and the 60 MHz semi-log amplifier on T5 side. Respective outputs
video signals and 60 MHz IF signals are superimposed and sent to RPU-013. At the
input stage of SPU board, superimposed signals are separated at HPF and LPF.
Major control signals of IF board
- SDATA, CLK, DATEN, TEST SIG, TEST SIG ENABLE
SDATA, CLK and DATEN control signals from the RFC board control the gain of
U16. This control data is based on the setting value of [Menu] -> 0 -> 2 -> 2:Cable
ATT ADJ.
Purpose of the gain control;
Superimposed 60 MHz IF signals and video signals are sent to RPU-013 trough
the coaxial cable. IF signals of 60 MHz, in particular, inputted into RPU-013
have different levels according to cable length. The gain control is performed to
compensate the cable loss on the IF board side and allows inputs into RPU-013
at a constant level.
See page.4-13 for the adjusting method.
For TEST SIG and TEST SIG ENABLE control signals, dummy echo signals
are inputted into CR10 if [Menu] -> 0 -> 2 -> 2:Cable ATT ADJ is set to AUTO.
The gain correction is automatically performed based on these signals.
Q3
Q2
TEST
TEST ENABLE
MBS ENABLE
STC CONT
U2 0 U2 1
U2 2
U27
U28
U1 6
U3
U1 0
PIN ATT
TUNNING
PIN ATT CONT
ATT CONT
ATT CONT
PEDES TAL FET
STC DETECT
U1 1
TP1
Q7,8 U4
TUNE GAIN
U2 3
U25
TUNE GATE N
SAMPLE HO LD
U5
U6
U5
U18
TUNE IND
(B.W)
LPF
HPF
D-MONI-OUT
(0 - 2.5Vdc)
D-MONI-IN
(0 - 120mVdc)
IF-VIDEO MIX
(0 - 3Vdc)
IF IN (60MHz)
VGA
Q4
Q1
T5
S
M, L
LOG
CR10
SIG level
cable ATT ADJ.
VBW A, B
Video SIG.
60MHz IF SIG.
SDATA
CLK
DATEN
FET ATT N
FET ATT N
FET ATT N
U25
TUNE
MIC
To RPU-013
1.SDATA
2. CLK
3. DATEN
4, 7, 11. GND
5. VBW B
6. VBW A
8. STC DETECT
9. TUNE GAIN
10. TUNE IND
12. MSB ENABLE
13. TUNE GATE N
14. SAMPLE HOLD
J821
J822
1. D MONO OUT
2. PIN ATT CONT
3. TUNE
4. FET ATT N
5. STC CONT
6. -12V
7, 9. GND
8. +5V
10. +12V
11. TEST ENABLE
12. TEST SIG
[J825-1]
[J825-5]
[J825-7]
[J824]
[J823]
C28
CR2
(DET)
BPF
Hi: Disale
Lo: Enable
Hi: SW ON
Lo: SW OFF

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