Revision B MAC™ 5000 resting ECG analysis system 2-27
2024917-010
Equipment Overview: Theory of Operation
VGA LCD/CRT Interface
An internal backlit LCD is home for the MAC 5000’s graphical interface.
In addition, external VGA monitors are supported for stress applications.
Control for a standard VGA format (640 x 480 pixels) LC display is
provided by the FPGA. The board is designed to support MAC3500 LCD
display also. Though the interface to LCD is same, external CCFL backlit
inverter is different for both display. Two connectors are provided for
external CCFL backlight inverters as well as two digital controls for On/
Off and brightness. While the FPGA is capable of directly driving the
LCD, external hardware is required to generate the analog video levels
expected by external VGA monitors.
LCD Panel EMI Reduction Components
To reduce EMI, 47pF capacitors have been added to all LCD digital lines.
In addition, 49.9
Ω resistors have been added to the video clock and Sync
lines.
CRT Video DAC / Sync / Buffers
A triple 6-bit video DAC supports external analog VGA monitors. Only
one DAC/Level Shifter/Buffer will be described, as they are all identical
in function. The video output is referenced to a filtered tap (FB107, C29)
off the +3V-M supply rail and then level shifted back to ground.
Each DAC is comprised of six binary weighted resistors and a seventh
blank/sync signal resistor. The FPGA LCD data outputs sink current
through the 75
Ω load resistor in proportion to their respective DAC
resistors. The voltage across the 75
Ω load resistor represents the sum of
all drive currents. Minor non-linearity is introduced in the DAC transfer
function by the fact that the summing junction varies in voltage with
DAC current.
The 3.3V referred video is shifted back to ground by a blocking capacitor.
The shifted video signal is buffered (and further shifted) by emitter
followers. Transistors clamp the negative excursions of the bases of the
emitter followers to one diode drop above ground, so the most negative
level at the emitter of the emitter followers is ground. Nominal full-scale
swing is 1VP-P (blank to white).
Bias for the base of the clamp transistors is provided by a 1.4V bias
supply consisting of a stack of two diode connected transistors (Q8). This
2Vbe bias exactly cancels the 2Vbe shift produced by the level clamp and
output buffer. Since all transistors are of the same type their Vbe’s track
well enough to provide acceptable output offset.
Diode clamps to ground and +3V-EMI provide ESD protection for the
VGA video and sync signals. The +3V-EMI rail is isolated from ESD
transients by FB106.
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