HackRF
(continued from previous page)
MS1_P1[15: 8] (register 53) = 0x12
MS1_P1[ 7: 0] (register 54) = 0x00
MS1_P2[19:0] = 0
MS1_P3[19:0] = 0
Initialization:
# Disable all CLKx outputs.
[0xC0 3 0xFF]
# Turn off OEB pin control for all CLKx
[0xC0 9 0xFF]
# Power down all CLKx
[0xC0 16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80]
# Register 183: Crystal Internal Load Capacitance
# Reads as 0xE4 on power-up
# Set to 10pF (until I find out what loading the crystal/PCB likes best)
[0xC0 183 0xE4]
# Register 187: Fanout Enable
# Turn on XO and MultiSynth fanout only.
[0xC0 187 0x50]
# Register 15: PLL Input Source
# CLKIN_DIV=0 (Divide by 1)
# PLLB_SRC=0 (XTAL input)
# PLLA_SRC=0 (XTAL input)
[0xC0 15 0x00]
# MultiSynth NA (PLL1)
[0xC0 26 0x00 0x00 0x00 0x0E 0x00 0x00 0x00 0x00]
# MultiSynth NB (PLL2)
...
# MultiSynth 0
[0xC0 42 0x00 0x00 0x00 0x08 0x00 0x00 0x00 0x00]
# MultiSynth 1
[0xC0 50 0x00 0x00 0x00 0x12 0x00 0x00 0x00 0x00]
# Registers 16 through 23: CLKx Control
# CLK0:
# CLK0_PDN=0 (powered up)
# MS0_INT=1 (integer mode)
# MS0_SRC=0 (PLLA as source for MultiSynth 0)
# CLK0_INV=0 (not inverted)
# CLK0_SRC=3 (MS0 as input source)
# CLK0_IDRV=3 (8mA)
# CLK1:
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92 Chapter 24. Lemondrop Bring Up
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