HITACHI Deskstar & CinemaStar 7K1000.B & Deskstar E7K1000 Hard Disk Drive specification
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the CRC on the FIS may be correct. These examples illustrate that some Phy event counters are sensitive to the
implementation of the counters themselves, and thus these implementation sensitive counters cannot be used
as an absolute measure of interface quality between different implementations.
9.20.3.1 Counter Reset Mechanisms
There are two mechanisms by which the host can explicitly cause the Phy counters to be reset.
The first mechanism is to issue a BIST Activate FIS to the device. Upon reception of a BIST Activate FIS the
device shall reset all Phy event counters to their reset value. The second mechanism uses the READ LOG EXT
command. When the device receives a READ LOG EXT command for log page 11h and bit 0 in the Features
register is set to one, the device shall return the current counter values for the command and then reset all Phy
event counter values.
9.20.3.2 Counter Identifiers
Each counter begins with a 16-bit identifier. 0 defines the counter value for each identifier. Any unused counter
slots in the log page should have a counter identifier value of 0h.
Optional counters that are not implemented shall not be returned in log page 11h. A value of ‗0‘ returned for a
counter means that there have been no instances of that particular event. There is no required ordering for event
counters within the log page; the order is arbitrary and selected by the device vendor.
For all counter descriptions, ‗transmitted‘ refers to items sent by the device to the host and ‗received‘ refers to
items received by the device from the host.
Bits 14:12 of the counter identifier convey the number of significant bits that counter uses. All
counter values consume a multiple of 16-bits. The valid values for bits 14:12 and the
corresponding counter sizes are:
1h 16-bit counter
2h 32-bit counter
3h 48-bit counter
4h 64-bit counter
Any counter that has an identifier with bit 15 set to one is vendor specific. This creates a vendor specific range of
counter identifiers from 8000h to FFFFh. Vendor specific counters shall observe the number of significant bits
14:12 as defined above.
No counter value; marks end of counters in the page
Command failed and ICRC bit set to one in Error register
Not supported (R_ERR response for Data FIS)
Not supported (R_ERR response for Device-to-Host Data FIS)
Not supported (R_ERR response for Host-to-Device Data FIS)
Not supported (R_ERR response for Non-data FIS)
Not supported (R_ERR response for Device-to-Host Non-data FIS)
Not supported (R_ERR response for Host-to-Device Non-data FIS)
Not supported (Device-to-Host non-Data FIS retries)
Transitions from drive PhyRdy to drive PhyNRdy
Signature Device-to-Host Register FISes sent due to a COMRESET
CRC errors within a Host-to-Device FIS
Non-CRC errors within a Host-to-Device FIS
Not supported (R_ERR response for Host-to-Device Data FIS due to CRC
errors)
Not supported (R_ERR response for Host-to-Device Data FIS due to
non-CRC errors)
Not supported (R_ERR response for Host-to-Device Non-data FIS due to
CRC errors)
Not supported (R_ERR response for Host-to-Device Non-data FIS due to
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