HT46R23/HT46C23
Pin Name I/O
Configuration
Option
Description
PA0~PA2
PA3/PFD
PA4/TMR
PA5/INT
PA6/SDA
PA7/SCL
I/O
Pull-high
Wake-up
PA3 or PFD
PA6/PA7 or
SDA/SCL
Bidirectional 8-bit input/output port. Each individual bit on this
port can be configured as a wake-up input by a configuration
option. Software instructions determine if the pin is a CMOS
output or Schmitt Trigger input. A configuration option deter
-
mines which bits on the port have pull-high resistors. Pins PA3,
PA4 and PA5 are pin-shared with PFD, TMR and INT
respec
-
tively. Pins PA6 and PA7 are pin-shared with SDA and SCL re
-
spectively and are used to implement the I
2
C bus function.
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
PB4/AN4
PB5/AN5
PB6/AN6
PB7/AN7
I/O Pull-high
Bidirectional 8-bit input/output port. Software instructions de
-
termine if the pin is a CMOS output or Schmitt Trigger input. A
configuration option determines if all pins on the port have
pull-high resistors. PB is pin-shared with the A/D input pins.
The A/D inputs are selected via software instructions. Once
selected as an A/D input, the I/O function and pull-high resis
-
tor functions are disabled automatically.
PC0~PC4 I/O Pull-high
Bidirectional 5-bit input/output port. Software instructions de
-
termine if the pin is a CMOS output or Schmitt Trigger input. A
configuration option determines if all pins on this port have
pull-high resistors.
PD0/PWM0
PD1/PWM1
I/O
Pull-high
I/O or PWM
Bidirectional 2-bit input/output port. Software instructions de
-
termine if the pin is a CMOS output or Schmitt Trigger input. A
configuration option determines if both pins on this port have
pull-high resistors. The PWM0 output is pin-shared with pin
PD0 and the PWM1 output is pin-shared with PD1, selected
via configuration options.
OSC1
OSC2
I
O
Crystal or RC
OSC1, OSC2 are connected to an external RC network or ex-
ternal crystal (determined by configuration option) for the in-
ternal system clock. For external RC system clock operation,
OSC2 is an output pin for 1/4 system clock.
RES I
¾
Schmitt Trigger reset input. Active low.
VDD
¾¾
Positive power supply
VSS
¾¾
Negative power supply, ground
Note 1. Each pin on PA can be programmed through a configuration option to have a wake-up function.
2. Individual pins on PA can be selected to have a pull-high resistors. However, individual pins on
Port B, Port C and Port D cannot be selected to have pull-high resistors. If the pull-high
configuration is chosen for a particular PB, PC or PD port, then all input pins on this port will
be connected to pull-high resistors.
3. The pin description table is based on the 28-pin device. Due to packaging limitations some pins
may not exist on the 24-pin package.
10
A/D Type MCU
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