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Data Byte
The transmitted data is 8-bits wide and is transmitted after the slave device has acknowledged re
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ceipt of its slave address. The order of serial bit transmission is the MSB first and the LSB last. Af
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ter receipt of 8-bits of data, the receiver must transmit an acknowledge signal, level ²0², before it
can receive the next data byte. If the transmitter does not receive an acknowledge bit signal from
the receiver, then it will release the SDA line and the master will send out a STOP signal to release
control of the I
2
C bus. The corresponding data will be stored in the HDR register. If setup as a
transmitter, the microcontroller slave device must first write the data to be transmitted into the
HDR register. If setup as a receiver, the microcontroller slave device must read the transmitted
data from the HDR register.
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Receive Acknowledge Bit
When the receiver wishes to continue to receive the next data byte, it must generate an acknowl
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edge bit, known as TXAK, on the 9th clock. The microcontroller slave device, which is setup as a
transmitter will check the RXAK bit in the HSR register to determine if it is to send another data
byte, if not then it will release the SDA line and await the receipt of a STOP signal from the master.
Chapter 1 Hardware Structure
59
S C L
S D A
S t a r t b i t D a t a
s t a b l e
D a t a
a l l o w
c h a n g e
S t o p b i t
Data Timing Diagram
S t a r t
W r i t e S l a v e
A d d r e s s t o H A D R
S E T H E N
I
2
C B u s
I n t e r r u p t = ?
E n a b l eD i s a b l e
S E T E H I
W a i t f o r I n t e r r u p t
G o t o M a i n P r o g r a m
C L R E H I
P o l l H I F t o d e c i d e
w h e n t o g o t o I
2
C B u s I S R
G o t o M a i n P r o g r a m
I
2
C Bus Initialization Flow Chart
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