Rev. 2.50 134 June 22, 2017 Rev. 2.50 135 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
CCRP
CCRA
0x3FF/
0xFFFF
CCRA = 0
Coun ter overflows
CCRP Int.
Flag TnPF
CCRA Int.
Flag TnAF
CCRA > 0 Counter cleared by CCRA value
TM O/P Pin
Tn ON bit
Pause Counter
Reset
Output Pin
Reset to ini tial value
Output Pin set
to Initial Level
Low if TnOC = 0
Output Tog g le
with TnAF flag
Here TnIO1, TnIO0 = 11
Toggle Output Select
Now TnIO1, TnIO0 = 10
Active High Output
Select
TnPAU bit
Resum e
Stop
Time
TnPF not
g ener ated
No TnAF flag
g ener ated on
CCRA overflow
Output does
not change
CCRA = 0
Output inverts
when TnPOL is hig h
Tn POL bit
TnCCLR = 1; TnM[1:0] = 00
Output controll ed by
other pin-shared function
Output not affected by
TnAF flag remains High
until reset by TnON bit
Coun ter Value
Compare Match Output Mode – TnCCLR=1
Note:1.WithTnCCLR=1,aComparatorAmatchwillclearthecounter
2.TheTMoutputpiniscontrolledonlybytheTnAFag
3.TheoutputpinisresettoitsinitialstatebyaTnONbitrisingedge
4.ATnPFagisnotgeneratedwhenTnCCLR=1