Rev. 2.50 136 June 22, 2017 Rev. 2.50 137 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Timer/Counter Mode
Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto11respectively.
TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode
generatingthesameinterruptags.TheexceptionisthatintheTimer/CounterModetheTMoutput
pinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompareMatch
OutputModecanbeusedtounderstanditsfunction.AstheTMoutputpinisnotusedinthismode,
thepincanbeusedasanormalI/Opinorotherpin-sharedfunction.
PWM Output Mode
Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto10respectively
andalsotheTnIO1andTnIO0bitsshouldbesetto10respectively.ThePWMfunctionwithin
theTMisusefulforapplicationswhichrequirefunctionssuchasmotorcontrol,heatingcontrol,
illuminationcontroletc.Byprovidingasignalofxedfrequencybutofvaryingdutycycleonthe
TMoutputpin,asquarewaveACwaveformcanbegeneratedwithvaryingequivalentDCRMS
values.
AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated
waveformisextremelyflexible.InthePWMmode,theTnCCLRbithasnoeffectasthePWM
period.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform,oneregister
isusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,whiletheother
oneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequencyordutycycle
isdeterminedusingtheTnDPXbitintheTMnC1register.ThePWMwaveformfrequencyandduty
cyclecanthereforebecontrolledbythevaluesintheCCRAandCCRPregisters.
Aninterruptag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch
occursfromeitherComparatorAorComparatorP.TheTnOCbitintheTMnC1registerisusedto
selecttherequiredpolarityofthePWMwaveformwhilethetwoTnIO1andTnIO0bitsareusedto
enablethePWMoutputortoforcetheTMoutputpintoaxedhighorlowlevel.TheTnPOLbitis
usedtoreversethepolarityofthePWMoutputwaveform.
• 10-bit STM, PWM Mode, Edge-aligned Mode, TnDPX=0
CCRP 001b 010b 011b 100b 101b 110b 111b 000b
Period
128 256 384 512 640 768 896 1024
Duty CCRA
Iff
SYS
=16MHz,TMclocksourceisf
SYS
/4,CCRP=100bandCCRA=128,
TheSTMPWMoutputfrequency=(f
SYS
/4)/512=f
SYS
/2048=7.8125kHz,duty=128/512=25%.
IftheDutyvaluedenedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe
PWMoutputdutyis100%.