Rev. 2.50 18 June 22, 2017 Rev. 2.50 19 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
LXT:Lowfrequencycrystaloscillator
*:VDDisthedevicepowersupplywhileAVDDistheADCpowersupply.TheAVDDpinisbonded
togetherinternallywithVDD.
**:VSSisthedevicegroundpinwhileAVSSistheADCgroundpin.TheAVSSpinisbondedtogether
internallywithVSS.
AsthePinDescriptionSummarytableappliestothepackagetypewiththemostpins,notalloftheabove
listedpinsmaybepresentonpackagetypeswithsmallernumbersofpins.
HT66F40
Pin Name Function OP I/T O/T Pin-Shared Mapping
PA0~PA7 Port A
PAWU
PAPU
ST CMOS —
PB0~PB7 Port B PBPU ST CMOS —
PC0~PC7 Port C PCPU ST CMOS —
PD0~PD7 Port D PDPU ST CMOS —
PE0~PE7 Port E PEPU ST CMOS —
PF0~PF1 Port F PFPU ST CMOS —
AN0~AN7 ADC input ACERL AN — PA0~PA7
VREF ADC reference input ADCR1 AN — PB5
C0-, C1- Comparator 0, 1 input
CP0C
CP1C
AN — PA3, PC3
C0+, C1+ Comparator 0, 1 input
CP0C
CP1C
AN — PA2, PC2
C0X, C1X Comparator 0, 1 output
CP0C
CP1C
PRM0
— CMOS PA0, PA5 or PF0, PF1
TCK0~TCK2 TM0~TM2 input PRM1 ST — PA2, PA4, PC2 or PD2, PD3, PD0
TP0_0, TP0_1 TM0 I/O
TMPC0
PRM2
ST CMOS PA0, PC5 or PC6, PD5
TP1A TM1 I/O
TMPC0
PRM2
ST CMOS PA1 or PC7
TP1B_0~TP1B_2 TM1 I/O
TMPC0
PRM2
ST CMOS PC0, PC1, PC5, or -, -, PE4
TP2_0, TP2_1 TM2 I/O
TMPC1
PRM2
ST CMOS
PC3, PC4 or PD1, PD4
INT0, INT1 Ext. Interrupt 0, 1 PRM1 ST — PA3, PA4 or PC4, PC5 or PE6, PE7
PINT Peripheral Interrupt PRM0 ST — PC3 or PC4
PCK
Peripheral Clock output PRM0 — CMOS PC2 or PC5
SDI
SPI Data input PRM0 ST — PA6 or PD2 orPB7
SDO SPI Data output PRM0 — CMOS PA5 or PD3 or PB6
SCS SPI Slave Select PRM0 ST CMOS PB5 or PD0 or PD7
SCK SPI Serial Clock PRM0 ST CMOS PA7 or PD1 or PD6
SCL I
2
C Clock PRM0 ST NMOS PA7 or PD1 or PD6
SDA I
2
C Data PRM0 ST NMOS PA6 or PD2 or PB7
SCOM0~SCOM3 SCOM0~SCOM3 SCOMC — SCOM PC0, PC1, PC6, PC7
OSC1 HXT/ERC pin CO HXT — PB1
OSC2 HXT pin CO — HXT PB2
XT1 LXT pin CO LXT — PB3
XT2 LXT pin CO — LXT PB4
RES Reset input CO ST — PB0
VDD
Power supply* — PWR — —