HP 4262A User Manual

Section
III
Model
4262A
Figure
3-7
Junction Capacitance Measurement
TO DC BIAS Connector
DC POWER SUPPLY ”
Setup -
The
figure
above
is
a
typical
test
setup
used
for
measuring
base-collector
junction
capa-
citance
(Cob)
of
an
NPN
transistor.
For
this
measurement,
test
leads
or
fixture
may
be
user
designed.
If
external
DC
bias
is
not
necessary,
arrangement
and
procedures
associated
with
this
function
may
be
deleted
from
setup.
Procedure -
1.
Press
LINE
button
to
turn
instrument
on.
After
the
initial
display
test,
trigger
lamp
will
begin
to
flash
and
the
4262A
functions
are
automatically
set
as
follows:
SELFTEST. ........ciiviiiiiiiiiannnn OFF
CIRCUITMODE. .......... ... AUTO
FUNCTION. . ... ..oiiiii it i e C
LCRRANGE ......... ..o, AUTO
LOSS. .. e D
DQRANGE ...........coiiiiiii AUTO
TESTSIGNAL . ...................... 1kHz
TRIGGER. .. ....... ... i, INT
9.
Press
TEST
SIGNAL
LOW
LEVEL
and
PRL
CIRCUIT
MODE
buttons.
The
test
signal
level
is
now
50mV
and
the
parallel
equivalent
circuit
mode
is
selected.
Note
A semiconductor junction capacitance meas-
urement must be made with a low level test
signal. If desired, TEST SIGNAL fequency may
be set to 10kHz.
3. Adjust C ZERO ADJ control for zero counts on LCR DISPLAY.
Note
If necessary, apply DC bias voltage internally
or externally at rear panel EXT DC BIAS con-
nector. External DC bias source should be
stable with low noise. Set DC BIAS switch in
. EXT position during application of external DC
bias.
Figure 3-8. Semiconductor Device Measurement (Sheet 1 of 2).
3-18

HP 4262A Specifications

General

Brand	HP
Model	4262A
Category	Measuring Instruments
Language	English