HP 8153A - Page 115

SRQ, The Service Request
A service request (SRQ) is forced when a bit in the Status Byte register goes
from 0-^1 AND the corresponding Service Request Enabie Mask bit is set.
If an SRQ is forced, the Request Service (RQS) bit is set to 1. This bit remains
at 1 untii read by a serial poli, even if the reason or condition that caused the
service request no longer exists. Similarly, if a serial poll reads the RQS it is
reset to 0, even if the condition that caused the service request stil! exists. The
serial poll command transfers the value of the Status Byte register to a variable.
Input Queue
The input queue is a FIFO queue (first-in first-out) and is 1024 bytes long.
Output Queue
The output queue is a FIFO queue (first-in first-out) and is 274 bytes long.
The message available, Message Available (MAV), bit is set in bit four of the
Status Byte register whenever the output queue is not empty. Receiving a new
program message clears the output queue and the Message Available (MAV) bit.
This happens directly after the program message terminator is received.
Error Queue
The error queue is a FIFO queue (first-in first-out) and is 30 errors long. That is,
the oldest error is the first error to be read.
If the queue overflows, message ’-350 <too many errors>’ overlays the last
message in the queue.
Remote Operation - Common Commands 6-3